Semiconductor device manufacturing method including ashing proce

Details Semiconductor device manufacturing method including ashing proce Semiconductor device manufacturing method including ashing proce

1997-10-30

2000-04-04

Utech, Benjamin

Cleaning and liquid contact with solids

Processes

Including application of electrical radiant or wave energy...

216 77, 216 57, 438725, 438734, 134 12, H01L 21302, B08B 600

Patent

active

060448504

ABSTRACT:
Ashing process of a resist pattern used in a semiconductor device manufacturing method is conducted by exposing the resist, the wirings, and their peripheral regions to a first atmosphere which includes a first product obtained by plasmanizing a gas containing water at a rate of more than 30 flow rate %, and placing the resist in a second atmosphere which includes a second product obtained by plasmanizing an oxygen mixed gas which contains an oxygen gas as a principal component before or after or before and after the exposing step.

REFERENCES:
patent: 5226056 (1993-07-01), Kikuchi et al.
patent: 5397432 (1995-03-01), Konno et al.
patent: 5545289 (1996-08-01), Chen et al.
patent: 5560803 (1996-10-01), Mihara et al.
patent: 5578163 (1996-11-01), Yachi
patent: 5702869 (1997-12-01), Chien et al.
patent: 5783459 (1998-07-01), Suzuki et al.
1991 Dry Process Symposium, pp. 117-122.

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