Semiconductor device manufacturing: process – Semiconductor substrate dicing – With attachment to temporary support or carrier
Reexamination Certificate
2002-07-03
2004-08-17
Dang, Phuc T. (Department: 2818)
Semiconductor device manufacturing: process
Semiconductor substrate dicing
With attachment to temporary support or carrier
C438S613000
Reexamination Certificate
active
06777313
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2001-203647, filed Jul. 4, 2001, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a semiconductor device manufacturing method and more particularly to a step of dividing a wafer on which elements have been formed into discrete chips, picking up and mounting each chip.
2. Description of the Related Art
Conventionally, a semiconductor device is formed by a manufacturing process as shown in the flowchart shown in
FIG. 1
, for example. First, elements are formed on a semiconductor substrate (wafer) by use of a known manufacturing process (STEP
1
). Then, bumps which are electrically connected to the elements are formed on the main surface of the wafer having the elements formed thereon (STEP
2
). A back side grinding tape (BSG tape) is attached to the back surface of the wafer (STEP
3
) and a back side grinding process is performed to make the wafer thin (STEP
4
). After this, a dicing tape is attached to the element forming surface of the wafer which is made thin (STEP
5
) and the wafer is diced (full-cut dicing) from the back surface side thereof by use of a diamond blade or laser blade and divided into a discrete form (STEP
6
). Next, the back surface of one of the chips obtained by dividing the wafer in a discrete from is picked up by use of a suction tool which is called a collet (STEP
7
), seal resin is attached to a base board, then the chip is attached to the base board having the seal resin attached thereto (STEP
8
) and the flip chip interconnection process and sealing process are performed to mount the chip (STEP
9
).
However, in the above manufacturing method, the following problems (a) to (c) occur.
(a) Since the back side grinding process is performed after the bumps are formed, the wafer may be broken with the bump as the starting point and the manufacturing yield is lowered. Therefore, it becomes essential to limit the height of the bump and if a chip using high bumps such as ball bumps or stud bumps is used, the wafer cannot be made thin.
(b) Since it is necessary to perform the two steps of attaching the seal resin to the base board and attaching the chip to the base board (with the seal resin), the positional deviation of the attachment will become large.
(c) In order to avoid the above positional deviation, it is necessary to make the size of the seal resin larger than the chip size. However, if the size of the seal resin is made larger than the chip size, extra seal resin lying in the peripheral portion of the chip creeps on the back surface of the chip at the time of flip chip interconnection in some cases. In order to suppress the above phenomenon, it is necessary to cover the back surface of the chip with a Teflon sheet or the like at the time of flip chip interconnection, raising the manufacturing cost.
In order to solve the above problem (a), as shown in the flowchart of
FIG. 2
, a manufacturing method in which bumps are formed (STEP
7
: formation of stud bumps) after the wafer is divided into discrete chips (STEPS: full-cut dicing and STEP
6
: pickup) is proposed. In this case, however, since it is necessary to form the stud bumps for each chip, the manufacturing process is complicated in comparison with a manufacturing method in which the bumps are formed in the wafer state and a rise in the manufacturing cost cannot be avoided.
As described above, the conventional semiconductor device manufacturing method has the problem that when the back surface thereof is ground, the wafer tends to break at the position of the bump, which lowers manufacturing yield.
Further, if a chip using the high bumps such as the ball bumps or stud bumps is used, there occurs a problem that the wafer cannot be made thin.
The two steps of attaching the seal resin to the base board and attaching the chip to the base board (with the seal resin) are required and there occurs a problem that the mounting accuracy will be lowered due to the positional deviation of the attachment.
In addition, if an attempt is made to prevent the seal resin from creeping on the back surface of the chip, there occurs a problem that a Teflon sheet or the like is required and the manufacturing cost becomes high.
Further, the manufacturing method in which bumps are formed after the wafer is divided into discrete chips has a problem that the manufacturing process becomes complicated and the manufacturing cost is raised.
BRIEF SUMMARY OF THE INVENTION
According to an aspect of the present invention, there is provided a semiconductor device manufacturing method comprising forming bumps electrically connected to elements on a main surface of a wafer on which the elements are formed, forming grooves with depths which do not reach the back surface of the wafer in the wafer on the main surface side thereof along dicing lines or chip dividing lines of the wafer, coating a bump forming surface side of the wafer with a seal member, performing a back side grinding process for the wafer to make the wafer thin, and at the same time, divide the wafer into individual chips, picking up one of the chips which are discretely divided by performing the back side grinding process, and heating and melting the bumps of the picked-up chip to bond and mount the chip to and on a base board, and at the same time, melting the seal member for sealing.
According to another aspect of the present invention, there is provided a semiconductor device manufacturing method comprising forming grooves with depths which do not reach a back surface of a wafer on which elements are formed in the wafer on a main surface side thereof along dicing lines or chip dividing lines of the wafer, forming bumps electrically connected to the elements on a main surface of the wafer, coating a bump forming surface side of the wafer with a seal member, performing a back side grinding process for the wafer to make the wafer thin, and at the same time, divide the wafer into individual chips, picking up one of the chips which are discretely divided by performing the back side grinding process, and heating and melting the bumps of the picked-up chip to bond and mount the chip to and on a base board, and at the same time, melting the seal member for sealing.
According to still another aspect of the present invention, there is provided a semiconductor device manufacturing method comprising forming bumps electrically connected to elements on a main surface of a wafer on which the elements are formed, coating a bump forming surface side of the wafer with a seal member, cutting the seal member and forming grooves with depths which do not reach the back surface of the wafer in the wafer along dicing lines or chip dividing lines thereof, performing a back side grinding process for the wafer to make the wafer thin, and at the same time, divide the wafer into individual chips, picking up one of the chips which are discretely divided by performing the back side grinding process, and heating and melting the bumps of the picked-up chip to bond and mount the chip to and on a base board, and at the same time, melting the seal member for sealing.
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Kiritani Mika
Kurosawa Tetsuya
Takano Terunari
Takyu Shinya
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