Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle – Analysis and verification
Reexamination Certificate
2007-08-24
2011-10-04
Do, Thuan (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Design of semiconductor mask or reticle
Analysis and verification
C716S055000, C716S132000, C716S139000
Reexamination Certificate
active
08032844
ABSTRACT:
A semiconductor manufacturing method comprising, a data generating process including, acquiring a simulation light pattern that simulates a shape of a light exposure pattern formed on a substrate on the basis of design data of a semiconductor device, acquiring a simulation electron beam exposure pattern that simulates a shape of an electron beam exposure pattern formed by an electron beam exposure on the substrate on the basis of the design data, extracting difference information representing a shape difference portion between the simulation light pattern and the simulation electron beam exposure pattern, acquiring changed design data for modifying shape by changing the design data in accordance with the difference information, conducting the electron beam exposure on the substrate by use of the changed design data for modifying the shape.
REFERENCES:
patent: 6370441 (2002-04-01), Ohnuma
patent: 7257790 (2007-08-01), Maeda
patent: 7382447 (2008-06-01), Mieher et al.
patent: 9246144 (1997-09-01), None
patent: 10125574 (1998-05-01), None
patent: 11111594 (1999-04-01), None
Do Thuan
Fujitsu Patent Center
Fujitsu Semiconductor Limited
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