Semiconductor device manufacturing method

Details Semiconductor device manufacturing method Semiconductor device manufacturing method

2002-10-30

2004-01-27

Trinh, Michael (Department: 2822)

Semiconductor device manufacturing: process

Having magnetic or ferroelectric component

C438S240000, C438S250000, C438S253000, C438S396000

Reexamination Certificate

active

06682944

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims priority of Japanese Patent Application NO. 2002-054440, filed in Feb. 28, 2002, the contents being incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device manufacturing method and, more particularly, a semiconductor device manufacturing method having the step of etching the electrode material that constitutes the capacitor using the ferroelectric substance or the high-dielectric substance.
2. Description of the Prior Art
In recent years, it is expected that the semiconductor memory using the ferroelectric capacitor or the high-dielectric capacitor is a promising device. The ferroelectric capacitor is formed by following steps, for example.
First, as shown in
FIG. 1A
, the first metal film
102
, the ferroelectric film
103
, and the second metal film
104
are formed sequentially on the insulating film
101
, and then the resist pattern
105
having the capacitor shape is formed on the second metal film
104
.
Then, the second metal film
104
, the ferroelectric film
103
, and the first metal film
102
are etched sequentially by using the resist pattern
105
as a mask. According to this patterning, as shown in
FIG. 1B
, the second metal film
104
acts as the upper electrode
104
a
of the capacitor
106
, the ferroelectric film
103
acts as the dielectric film
103
a
of the capacitor
106
, and the first metal film
102
acts as the lower electrode
102
a
of the capacitor
106
.
Meanwhile, since the first metal film
102
and the second metal film
104
are formed of a noble metal such as iridium, platinum, etc. or its oxide respectively and the ferroelectric film
103
is formed of PZT system material, they have the poor chemical reactivity at the normal temperature. Thus, the second metal film
104
, the ferroelectric film
103
, and the first metal film
102
are successively etched mainly by the sputter reaction at the time of the patterning. As the etching gas in the sputter, mainly the mixed gas consisting of an inert gas such as argon and chlorine is employed.
If the metal film is etched by the sputter using argon and chlorine, the adhesion of the conductive strong sidewall deposition (fence) onto the side surface of the capacitor
106
is brought about.
Therefore, in order to suppress the formation of the fence, such a structure is employed that an inclination angle of the side surface of the capacitor
106
is set gently (made small) by setting the etching conditions that make the side surface of the resist pattern
105
retreat, or the shape of the capacitor
106
is formed stepwise.
However, since the gentle inclination angle of the side surface of the capacitor leads to the increase of the capacitor area, such gentle inclination angle interferes with the miniaturization and the higher integration of the semiconductor device having the capacitor. In addition, in the etching to form the capacitor, the optimum etching rate that is suited to the film cannot be assured only by the chlorine and the inert gas.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a semiconductor device manufacturing method capable of assuring the optimum etching according to each of the films constituting a capacitor.
The above subjects can be overcome by providing a semiconductor device manufacturing method which comprises the steps of forming an underlying insulating film over a semiconductor device; forming a first conductive film on the underlying insulating film; forming a dielectric film consisting of ferroelectric material and high-dielectric material on the first conductive film; forming a second conductive film on the dielectric film; etching selectively the second conductive film in a first atmosphere containing a bromine to shape the second conductive film into a capacitor upper electrode; etching selectively the dielectric film in a second atmosphere containing a chlorine to shape the dielectric film into a capacitor dielectric film; and etching selectively the first conductive film in a third atmosphere containing the bromine to shape the first conductive film into a capacitor lower electrode.
The above subjects can be overcome by providing a semiconductor device manufacturing method which comprises the steps of forming an underlying insulating film over a semiconductor device; forming a first conductive film on the underlying insulating film; forming a dielectric film consisting of ferroelectric material and high-dielectric material on the first conductive film; forming a second conductive film on the dielectric film; etching selectively the second conductive film in a first atmosphere, into which a first etching gas and an oxygen are introduced, to shape the second conductive film into a capacitor upper electrode; etching selectively the dielectric film in a second atmosphere, into which a second etching gas not-containing the oxygen is introduced, to shape the dielectric film into a capacitor dielectric film; and etching the first conductive film exposed from a mask in a third atmosphere, into which a third etching gas and the oxygen are introduced, to shape the first conductive film into a capacitor lower electrode.
According to the present invention, the conductive film constituting the capacitor electrode is etched in the Br-containing atmosphere when such conductive film is patterned, and the ferroelectric film or the high-dielectric film constituting the capacitor dielectric film is etched in the Cl-containing atmosphere when such film is patterned.
Therefore, the side surfaces of the capacitor electrode pattern is shaped into the almost perpendicular shape to contribute the higher integration of the semiconductor device, and also the degradation in the film quality of the dielectric film pattern is suppressed and thus the deterioration of the capacitor characteristics is prevented.
Also, according to another invention, the conductive film constituting the capacitor electrode is etched in the etching atmosphere containing the oxygen when such conductive film is patterned, and the ferroelectric film or the high-dielectric film constituting the capacitor dielectric film is etched in the etching atmosphere into which the gas except the oxygen is introduced when such film is patterned.
Therefore, the degradation of the dielectric film is suppressed in forming the capacitor electrode and also the reduction of the etching rate of the dielectric film is prevented, when the dielectric film consists of oxide. As the dielectric film, there is the oxide insulating film such as PZT system, for example.


REFERENCES:
patent: 5515984 (1996-05-01), Yokoyama et al.
patent: 5840200 (1998-11-01), Nakagawa et al.
patent: 6169009 (2001-01-01), Ju et al.
patent: 6232174 (2001-05-01), Nagata et al.
patent: 6388281 (2002-05-01), Jung et al.
patent: 8-45905 (1996-02-01), None
patent: 11-354510 (1999-12-01), None
patent: 2001036024 (2001-02-01), None

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