Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
1999-09-16
2001-05-01
Powell, William (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C156S345420, C438S710000
Reexamination Certificate
active
06225233
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device manufacturing machine and a method for manufacturing a semiconductor device for using the same manufacturing machine, and more specifically to a vacuum processing apparatus.
2. Description of Related Art
Referring to
FIG. 1
, there is shown a diagrammatic view illustrating a construction of a semiconductor device manufacturing machine. The shown machine includes a processing chamber
73
in which a predetermined processing is conducted on a semiconductor wafer
100
put on a stage
72
under low pressure, a load lock chamber
76
for loading the semiconductor wafer
100
to the manufacturing machine from an external source, and a feeding chamber
75
affixed in an air-tight manner between the processing chamber
73
and the load lock chamber
76
and having therein a feeding mechanism (manipulator)
74
for feeding the semiconductor wafer
100
to and removing it from a predetermined position within the processing chamber
73
. The feeding chamber
75
is alternately put either in an atmospheric pressure or in a predetermined degree of vacuum. The feeding mechanism
74
has at its tip end a holder
77
for holding directly the semiconductor wafer
100
when the feeding mechanism
74
feeds the semiconductor wafer
100
. Between the processing chamber
73
and the feeding chamber
75
, there is provided a gate valve
78
for partitioning and sealing in an air-tight manner the processing chamber
73
from the feeding chamber
75
. Between the feeding chamber
75
and the load lock chamber
76
, there is provided another gate valve
79
for partitioning and sealing in an air-tight manner the feeding chamber
75
from the load lock chamber
76
. Furthermore, the load lock chamber
76
has still another gate valve
79
for partitioning and air-tightly closing between the load lock chamber
76
and a space external to the machine.
Now, operation of the above mentioned semiconductor device manufacturing machine, namely, a method for manufacturing the semiconductor device by using the above mentioned semiconductor device manufacturing machine, will be described.
First, the gate valve
80
is opened, and a semiconductor wafer
100
is set in the load lock chamber
76
at the atmospheric pressure. Thereafter, the gate valve
80
is closed, and then, the gate valve
79
is opened, so that the feeding chamber
75
which was at a predetermined vacuum level, becomes the same pressure as that of the load lock chamber
76
, namely near to the atmospheric pressure. In this condition, the feeding mechanism
74
is operated to hold the semiconductor wafer
100
in the load lock chamber
76
by the holder
77
and to move it into the feeding chamber
75
.
Thereafter, the gate valve
79
is closed, and the feeding chamber
75
is evacuated to the predetermined vacuum level. Then, the gate valve
78
is opened, and the feeding mechanism
74
is operated again, to move the semiconductor wafer
100
held by the holder
77
, into the processing chamber
73
, and to put the same on the stage
72
. After the semiconductor wafer
100
is put on the stage
72
, the holder
77
is retraced into the feeding chamber
75
, and then, the gate valve
78
is closed. Thus, a loading operation of the semiconductor wafer is completed, and a predetermined processing is carried out to the semiconductor wafer
100
. If the predetermined processing is completed, the processed semiconductor wafer
100
is removed from the processing chamber
73
through the feeding chamber
76
and the load lock chamber
76
by an unloading operation in which respective steps of the above mentioned loading operation of the semiconductor wafer are conducted in inverse order.
Next, a detail of the processing chamber
73
and a wafer handling sequence carried out within the processing chamber
73
will be described with reference to
FIGS. 2 and 3
, which diagrammatically illustrate a parallel plate type, single-wafer-processing type dry etching machine, which is one type of semiconductor device manufacturing machine.
As shown in
FIG. 2
, the processing chamber
73
includes an upper electrode
81
and a lower electrode
82
for generating plasma therebetween, the stage
72
provided at the side of the lower electrode
82
and for supporting the semiconductor wafer
100
when the semiconductor wafer
100
is etched, a compensating ring
83
provided on a lower surface of the upper electrode
81
and formed to extend toward a periphery of the semiconductor wafer
100
for the purpose of compensating evenness in etching of the semiconductor wafer
100
, and a plurality of lift pins
84
which can be vertically moved up and down in order to locate the semiconductor wafer
100
on the stage
72
and to maintain the semiconductor wafer
100
at a predetermined height from an upper surface of the stage
72
when the semiconductor wafer
100
is to be removed from the stage
72
. The above mentioned construction is disclosed in for example Japanese Patent Application Laid-open Publication No. JP-A-62-128122.
On the other hand, as shown in
FIG. 3
, the holder
77
includes holding guides
771
for preventing the semiconductor wafer
100
put on the holder
77
from deviating from a proper position.
At the time of placing the semiconductor wafer
100
on the stage
72
, the lift pins
84
are lifted to a top dead center, and in this condition, the holder
77
holding the semiconductor wafer
100
between the holding guides
771
is moved to a position directly above the stage
72
. Then, the holder
77
is lowered until the semiconductor wafer
100
is placed on the lift pins
84
and an upper surface of the holder
77
becomes lower than an lower surface of the semiconductor wafer
100
.
Thereafter, the holder
77
is retracted into the feeding chamber
75
from the position directly above the stage
72
within the processing chamber
73
, and the lift pins
84
are lowered to a bottom dead center. Thus, the semiconductor wafer
100
is placed on the stage
72
.
In the above operation, the holder
77
and the lift pins
84
are located not to interfere with each other. In addition, at the time of removing the semiconductor wafer
100
from the stage
72
, respective steps of the above mentioned operation for placing the semiconductor wafer
100
on the stage
72
, are conducted in inverse order.
As another example different from the above mentioned example, a chemical vapor deposition (CVD) machine, which is another type of semiconductor device manufacturing machine, comprises a holding plate for holding a semiconductor wafer, and another separate and removable holding plate configured to cover a periphery of the semiconductor wafer. This construction is disclosed by for example Japanese Patent Application Laid-open Publication No. JP-A-2-130819.
At the time of carrying out a predetermined chemical vapor deposition on the semiconductor wafer, the semiconductor wafer is placed on the holding plate. At this time, the vapor deposition occurs not only on the semiconductor wafer but also on the removable holding plate covering the periphery of the semiconductor wafer. As a result, a reaction product film deposited on the removable holding plate becomes particles, which adhere to the semiconductor wafer, with the result that the production yield of the manufacturing machine drops. Therefore, the removable holding plate is periodically exchanged with a new one.
In the above mentioned conventional semiconductor device manufacturing machines and the methods for manufacturing the semiconductor device by using the manufacturing machines, reaction products deposit on or adhere to a ring-like peripheral member located at the periphery of the semiconductor wafer in the processing chamber (for example, the compensating ring in the parallel plate type, single-wafer-processing type dry etching machine and the holding plate in the chemical vapor deposition machine), or alternatively, the ring-like peripheral member itself is etched. Therefore, it is nec
Hiramatsu Shinichi
Seo Hirofumi
NEC Corporation
Powell William
Sughrue Mion Zinn Macpeak & Seas, PLLC
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