Semiconductor device manufacturing line

Details Semiconductor device manufacturing line Semiconductor device manufacturing line

2003-03-17

2004-08-03

Niebling, John F. (Department: 2812)

Data processing: generic control systems or specific application

Specific application, apparatus or process

Product assembly or manufacturing

C414S222010, C414S331180

Reexamination Certificate

active

06772032

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device manufacturing line, and more particularly to a semiconductor device manufacturing line in which a semiconductor wafer is accommodated in a carrier and transferred between steps.
2. Description of the Background Art
A semiconductor integrated circuit is formed by successively performing a film deposition process, a photolithography process, a processing process and the like on a semiconductor wafer using a variety of semiconductor facilities in a semiconductor device manufacturing line.
The semiconductor manufacturing facilities include a semiconductor manufacturing apparatus substantially processing a semiconductor wafer in each step, a check apparatus determining whether the processing by the semiconductor manufacturing apparatus is appropriate, a transfer apparatus transferring a carrier which accommodates a semiconductor wafer, a stocker storing the carrier and the like.
In the semiconductor device manufacturing line, the operation of each semiconductor manufacturing facility is executed by a program that is built in a host computer in advance. Under the control of this program, the semiconductor wafer is accommodated in a prescribed carrier and transferred between process steps.
The method of operating the semiconductor manufacturing facility includes, for example, three operations: a wafer applying operation; a wafer manufacturing operation; and a wafer completing operation. A substantial operation for forming a semiconductor integrated circuit on a semiconductor wafer is carried out through the wafer manufacturing operation.
A rework processing operation and a carrier exchanging operation will be described as an exemplary wafer manufacturing operation.
First, the rework processing operation will be described. The rework processing operation refers to an operation in which when the processing performed on a semiconductor wafer by the semiconductor manufacturing apparatus is failed (out of specification) as a result of a prescribed check apparatus checking, that semiconductor wafer is restored to a state prior to that processing and the same processing is then performed on that semiconductor wafer again.
FIG. 21
shows a bay
119
at one step. Bay
119
is provided with four manufacturing apparatuses
110
a
-
110
d
, one check apparatus
116
, a wafer transport apparatus
148
, a manual rack
149
, an intra-bay transfer apparatus
120
, and a stocker
121
. It is noted that manual rack
149
stores a carrier. Stocker
121
is connected to intra-bay transfer apparatus
120
and an inter-bay transfer apparatus
122
.
A rework operation is performed based on a check result of check apparatus
116
. As shown in
FIG. 22
, the conventional check apparatus
116
is provided with a load port
111
receiving the carrier in which a semiconductor wafer is accommodated, similar to semiconductor manufacturing apparatus
110
. Here, two load ports
111
, that is, a left load port
111
a
and a right load port
111
b
are provided for performing successive processing.
A reader
112
for reading a carrier ID is attached to each load port
111
. When a carrier is transferred to load port
111
, reader
112
reads the carrier ID to identify that carrier ID with the instruction from host computer
114
.
Load port
111
is also provided with an opening/closing mechanism (not shown) for opening and closing a carrier door of the carrier. Furthermore, check apparatus
116
is provided with a carrier movement communication interface
113
and a control carrier communication interface
115
.
Carrier movement communication interface
113
indicates that a carrier is externally applied or ejected. Control communication interface
115
communicates semiconductor wafer processing information and the like with host computer
114
.
The conventional check apparatus
116
is provided with a failure load port
117
. This failure load port
117
is a port arranged for externally delivering a dedicated carrier into which a semiconductor wafer determined to be failed through the check is ejected (referred to as “NG carrier” hereinafter). It is noted that the semiconductor wafer determined to be passed is returned to the carrier placed on the original load port
111
.
In the rework operation, intra-bay transfer apparatus
120
connects semiconductor manufacturing apparatus
110
, check apparatus
116
and stocker
121
for transferring the carrier.
However, NG carrier is transferred by an operator
147
to wafer transport apparatus
148
, manual rack
149
and stocker
121
.
The carrier flow will now be described. Under the instruction of the host computer (not shown), as shown in
FIG. 21
, the carrier accommodating a semiconductor wafer for which processing is completed in semiconductor manufacturing apparatus
110
b
(operation pk
27
) is transferred by intra-bay transfer apparatus
120
from load port
111
of semiconductor manufacturing apparatus
110
b
to load port
111
of check apparatus
116
(operation pk
28
).
Check apparatus
116
checks a product wafer accommodated in the carrier to determine it is passed or failed as to whether the processing by semiconductor manufacturing apparatus
110
is properly performed. The product wafer determined as being passed is returned to the original carrier. On the other hand, the product wafers determined as being failed are collected by operator
147
into NG carrier arranged at failure load port
117
(operation pk
29
).
After all product wafers have been checked, the carrier that accommodates the product wafer determined as being passed (referred to as “parent lot” hereinafter) is transferred by intra-bay transfer apparatus
120
to intra-bay application port
139
(operation pk
30
). This parent lot is conveyed from intra-bay application port
139
to a shelf
134
of stocker
121
by a crane
133
and is accommodated in stocker
121
(operation pk
30
x
).
Meanwhile, NG carrier is removed from failure load port
117
of check apparatus
116
, transferred to manual rack
149
by operator
147
(operation pk
31
) and stored there temporarily.
Under the instruction of the host computer, the parent lot accommodated in stocker
121
is ejected to manual ejection port
136
(operation pk
32
). The parent lot ejected to manual ejection port
136
is transferred to manual rack
149
(operation pk
33
). Then, NG carrier is matched with the parent lot.
Then, NG carrier is regarded as a rework lot by operator
147
through the host computer, and the rework processing for the accommodated product wafer is started. First, as shown in
FIG. 23
, the rework lot on manual rack
149
is transferred to manual application port
135
of stocker
121
(operation pk
34
).
The rework lot transferred to manual application port
135
is once accommodated in stocker
121
(operation pk
35
). The rework lot accommodated in stocker
121
is subjected to the rework processing through the wafer manufacturing operation in accordance with manufacturing standard information for rework, held by the host computer.
The rework lot accommodated in stocker
121
is then transferred by inter-bay transfer apparatus
122
to the next step (operation pk
36
). As shown in
FIG. 24
, the rework lot transferred to the next step is then transferred by inter-bay transfer apparatus
122
and accommodated in stocker
121
in accordance with the wafer manufacturing operation under the instruction of the host computer (operation pk
37
).
In response to the demand, for example, from manufacturing apparatus
110
b
in the next step, the rework lot is ejected to intra-bay ejection port
140
(operation pk
38
). The rework lot on intra-bay ejection port
140
is transferred to load port
111
of manufacturing apparatus
110
b
by intra-bay transfer apparatus
120
(operation pk
39
). Manufacturing apparatus
110
b
processes the rework lot (operation pk
40
).
The rework lot for which manufacturing apparatus
110
b
completes the processing is transferred from load port
111
to the load port of check a

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