Data processing: generic control systems or specific application – Specific application – apparatus or process – Article handling
Reexamination Certificate
2000-07-05
2002-02-26
Ellis, Christopher P. (Department: 3651)
Data processing: generic control systems or specific application
Specific application, apparatus or process
Article handling
C700S121000
Reexamination Certificate
active
06351686
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to semiconductor device manufacturing apparatuses and control methods thereof. In particular, the invention relates to a semiconductor device manufacturing apparatus and a control method thereof which enable an efficient transportation of a process lot consisting of semiconductor wafers to be processed.
2. Description of the Background Art
Semiconductor devices such as a semiconductor memory device as a representative one have conventionally been manufactured through process steps in which the surface of a semiconductor wafer is subjected to various treatments such as film deposition and etching. A manufacturing apparatus for the semiconductor devices is thus constituted of various equipment and units such as a processing apparatus for film deposition and transfer equipment for transporting a semiconductor wafer as described below.
FIG. 17
is a perspective view showing a processing apparatus employed in a semiconductor device manufacturing apparatus for processing a semiconductor wafer. The processing apparatus is now described in conjunction with FIG.
17
.
Referring to
FIG. 17
, processing apparatus
104
includes load ports
105
a
and
105
b
, load lock chambers
106
a
and
106
b
, a wafer transfer unit
107
, a pretreatment chamber
108
, and a posttreatment chamber
109
. Load lock chambers
106
a
and
106
b
are located adjacently to respective load ports
105
a
and
105
b
. Pretreatment chamber
108
and posttreatment chamber
109
are located opposite to load lock chambers
106
a
and
106
b
with wafer transfer unit
107
therebetween.
Load ports
105
a
and
105
b
receive, from the outside of processing apparatus
104
, a semiconductor wafer cassette
102
holding a process lot (or lot) consisting of semiconductor wafers
101
to be processed. The lot constituted of semiconductor wafers
101
which is housed in semiconductor wafer cassette
102
is handled as a unit for managing fabrication of a semiconductor device at semiconductor wafer
101
.
An operation of processing apparatus
104
is described starting with transport of semiconductor wafer cassette
102
to load port
105
b
for briefly explaining the operation. A lot consisting of semiconductor wafers
101
is drawn out of semiconductor wafer cassette
102
transported to load port
105
b
. The lot thus drawn out is held in load lock chamber
106
b
. The air within load lock chamber
106
b
is then discharged for processing the semiconductor wafers in a vacuum. The inside of load lock chamber
106
b
is kept in the vacuum state. Semiconductor wafers
101
in vacuum load lock chamber
106
b
are taken out one by one and fed into pretreatment chamber
108
by wafer transfer unit
107
. In pretreatment chamber
108
, semiconductor wafer
101
undergoes first processing. After the first processing in pretreatment chamber
108
, semiconductor wafer
101
is transported by wafer transfer unit
107
from pretreatment chamber
108
to posttreatment chamber
109
for undergoing second processing. In posttreatment chamber
109
, semiconductor wafer
101
is subjected to the second processing. Semiconductor wafer
101
which has undergone the second processing is returned by wafer transfer unit
107
to load lock chamber
106
b
. These process steps are successively performed for semiconductor wafers
101
held in load lock chamber
106
b
which have not been processed. In other words, immediately after a preceding semiconductor wafer
101
which has been processed in pretreatment chamber
108
is transported to posttreatment chamber
109
, another semiconductor wafer
101
in load lock chamber
106
b
is fed into pretreatment chamber
108
. In this way, all semiconductor wafers
101
of the lot held in load lock chamber
106
b
are processed and then transported back to load lock chamber
106
b
. Air is then supplied into load lock chamber
106
b
to return it into atmospheric state. After this, the lot consisting of processed semiconductor wafers
101
(processed lot) is transferred from load lock chamber
106
b
into the original semiconductor wafer cassette
102
held at load port
105
b
and stored therein. Semiconductor wafer cassette
102
holding the processed lot is transferred from load port
105
b
to the outside of processing apparatus
104
. A series of process steps in processing apparatus
104
for the semiconductor wafers is accordingly completed.
Processing apparatus
104
shown in
FIG. 17
has two load ports
105
a
and
105
b
and two load lock chambers
106
a
and
106
b
placed therein. When a lot constituted of semiconductor wafers
101
currently being processed exists in one load lock chamber
106
b
, a lot consisting of semiconductor wafers to be processed next (next-processed lot) can be received in the other load lock chamber
106
a
via load port
105
a
and wait there. Accordingly, semiconductor wafers
101
can be processed consecutively in pretreatment chamber
108
and posttreatment chamber
109
.
FIG. 18
shows an entire structure of the semiconductor device manufacturing apparatus. The semiconductor device manufacturing apparatus has a plurality of bays
172
. Bays
172
each treated as a unit for management include a plurality of processing apparatuses
104
as shown in
FIG. 17
, a stocker
115
containing a semiconductor wafer cassette which houses a lot consisting of semiconductor wafers to be processed in processing apparatuses
104
, and an intra-bay transfer apparatus
110
for transferring the semiconductor wafer cassette between stocker
115
and processing apparatus
104
and between processing apparatuses
104
. Bays
172
are connected by an inter-bay transfer apparatus
123
which can transport the semiconductor wafer cassette between bays
172
. Processing apparatuses
104
include various processing apparatuses such as film deposition equipment and etching equipment for manufacturing a semiconductor device. In a predetermined manufacturing process of the semiconductor device, a semiconductor wafer cassette holding a lot consisting of semiconductor wafers to be processed is transported to predetermined processing apparatuses successively through predetermined process steps for performing predetermined processing on the semiconductor wafers.
Production of a semiconductor device thus requires that a lot consisting of semiconductor wafers to be processed is efficiently transported to various processing apparatuses. A conventional control process employed for transporting such a lot (i.e. a semiconductor wafer cassette holding a lot) is shown in FIG.
19
.
FIG. 19
shows a flow chart illustrating a lot transfer process in a conventional semiconductor device manufacturing apparatus. This process is controlled by a controller for controlling loading and unloading of a lot to and from processing apparatuses
104
. The controller controls processing apparatuses
104
; intra-bay transfer apparatus
110
and stocker
115
constituting bay
172
and inter-bay transfer apparatus
123
. Details of the process are described in conjunction with FIG.
19
.
Referring to
FIG. 19
, the process starts for each predetermined event (step
131
). After the process starts, a dispatch process (step
132
) is performed for determining a lot to be processed next (next-processed lot) in processing apparatus
104
being controlled. Simultaneously with the dispatch process (step
132
), a retrieve process (step
133
) is performed for determining a destination of a lot which has been processed (processed lot) in processing apparatus
104
. Subsequently, a transfer execution process (step
134
) is conducted. In the transfer execution process (step
134
), the next-processed lot which is designated in the dispatch process (step
132
) is sent to a load port of the processing apparatus
104
, or the processed lot is sent to the determined destination from the load port of the processing apparatus
104
. After the transfer process, the process shown in
FIG. 19
is completed (step
135
). It is noted that no tra
Fujisaki Atsushi
Iwasaki Junji
Yamaguchi Tomohiro
Ellis Christopher P.
McDermott & Will & Emery
Mitsubishi Denki & Kabushiki Kaisha
Tran Khoi H.
LandOfFree
Semiconductor device manufacturing apparatus and control... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device manufacturing apparatus and control..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device manufacturing apparatus and control... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2935262