Semiconductor device manufacture method and etching system

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching

Reexamination Certificate

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C438S725000, C257SE21024

Reexamination Certificate

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10883828

ABSTRACT:
A semiconductor device manufacture method includes the steps of forming a resist layer above a work target layer; exposing and developing the resist layer to form resist patterns including isolated pattern and dense patterns; monitoring widths of isolated and dense pattern of the resist patterns to determine trimming amounts of linewidths to be reduced; determining etching conditions for realizing the trimming amounts of both the isolated and dense patterns, the etching conditions using mixed gas of a gas having a function of mainly enhancing etching and a gas having a function of mainly suppressing etching; trimming the resist pattern under said determined etching conditions; and etching the work target layer by using said trimmed resist patterns. A desired pattern width an be realized stably by trimming using plasma etching.

REFERENCES:
patent: 5926690 (1999-07-01), Toprac et al.
patent: 2003/0165755 (2003-09-01), Mui et al.
patent: 2000-77386 (2000-03-01), None
patent: 2003-31557 (2003-01-01), None

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