Semiconductor device including trench isolation structure and a

Details Semiconductor device including trench isolation structure and a Semiconductor device including trench isolation structure and a

1997-09-29

2000-06-27

Teska, Kevin J.

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With large area flexible electrodes in press contact with...

39550024, 39550025, 39550034, 257391, 257392, 257219, 438207, 438218, 438225, G06F 1750

Patent

active

060816627

ABSTRACT:
In a trench isolation structure having active regions at a main surface of a silicon substrate isolated by providing a gate electrode on an insulation film formed in a trench with a gate oxide film thereunder, the insulation film has a vertical cross section configuration wherein the carrier concentration of the active region at the proximity of the upper edge corner of the trench becomes lower than the carrier concentration at the center of the active region in a state where a predetermined bias voltage is applied to the gate electrode. According to this structure, electric field concentration at the edge of the trench isolation can be relaxed and generation of an inverse narrow channel effect suppressed. Therefore, the subthreshold characteristics can be improved.

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"Optimized Shallow Trench Isolation Structure and its Process for Eliminating Shallow Trench Isolation-Induced Parasitic Effects," IBM Technical Disclosure Bulletin, vol. 34, No. 11, Apr. 1992, pp. 276-277.
R.C. Vankemmel, et al. "A Study of the Corner Effect in Trench-Like Isolated Structures," IEEE Transactions on Electron Devices, vol. 37, No. 1, Jan. 1990, pp. 168-176.
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Andres Bryant, et al: "Characteristics of CMOS Device Isolation for the ULSI Age", IEDM 1994, pp. 671-674.

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