Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Patent
1997-08-18
1999-04-06
Chaudhuri, Olik
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Chip mounted on chip
257686, H01L 2348
Patent
active
058922873
ABSTRACT:
A three-dimensional semiconductor circuit assembly wherein each of several circuit chips is provided with patterned metal layers that extend from the circuit surface onto an edge side of the chip, then the chips are adhesively bonded to opposite surfaces of one or more dielectric spacers, respectively, whereby the edge sides of the resulting multiple-chip stack are readily connected to metal patterns on a substrate.
REFERENCES:
patent: 5281852 (1994-01-01), Normington
patent: 5313096 (1994-05-01), Eide
patent: 5327327 (1994-07-01), Frew et al.
patent: 5347428 (1994-09-01), Carson et al.
patent: 5397916 (1995-03-01), Normington
patent: 5426072 (1995-06-01), Finnila
patent: 5426566 (1995-06-01), Beilstein, Jr. et al.
patent: 5432729 (1995-07-01), Carson et al.
patent: 5523619 (1996-06-01), McAllister et al.
patent: 5616962 (1997-04-01), Ishikawa et al.
patent: 5619067 (1997-04-01), Sua et al.
patent: 5677569 (1997-10-01), Choi et al.
patent: 5714802 (1998-02-01), Cloud et al.
Archer Judith Sultenfuss
Hoffman Emily Ellen
Chaudhuri Olik
Donaldson Richard L.
Honeycutt Gary C.
Kelley Nathan K.
Texas Instruments
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