Semiconductor device including multi-chip

Details Semiconductor device including multi-chip Semiconductor device including multi-chip

2005-01-19

2009-06-30

Dinh, Son (Department: 2824)

Static information storage and retrieval

Addressing

Plural blocks or banks

C365S222000, C365S233500, C365S236000

Reexamination Certificate

active

07554872

ABSTRACT:
In order to implement a memory having a large storage capacity and a reduced data retention current, a non-volatile memory, an SRAM, a DRAM, and a control circuit are modularized into one package. The control circuit conducts assignment of addresses to the SRAM and DRAM, and stores data that must be retained over a long period of time in the SRAM. In the DRAM, a plurality of banks are divided into two sets, and mapped to the same address space, and sets are refreshed alternately. A plurality of chips of them are stacked and disposed, and wired by using the BGA and chip-to-chip bonding.

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