Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate
1998-04-15
2002-09-24
Loke, Steven (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified configuration
C257S751000, C257S762000, C257S763000
Reexamination Certificate
active
06455940
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device such as CSP (Chip Scale Package) including copper (Cu) wiring coated with barrier metal film for preventing oxidation and corrosion during a processing operation, and a method of producing the semiconductor device and a method of producing the semiconductor device. More particularly, the present invention relates to a semiconductor device which can improve the step coverage of the barrier metal film with respect to the Cu wiring or the like, and a method of producing the semiconductor device.
One example of the CSP includes a semiconductor element formed on a substrate, and a lead-in wiring for electrically connecting between an outputting electrode of the semiconductor element and the external electrode. The semiconductor element includes a plurality of electrodes. A plurality of lead-in wiring connected respectively with each electrode are provided without being in contact with each other electrically. In order to provide the semiconductor element with a function of relaxing that the stress to be applied upon the external electrode is applied to the semiconductor element, the semiconductor element further includes at least one interlayer film (referred to as insulation interlayer film). The surface of the semiconductor element is covered with protective films.
As the lead-in wiring, Cu wiring is used because electrical characteristics thereof are superior. The Cu wiring is necessary to be covered with barrier metal films, because oxidation and corrosion are caused during all of the producing steps.
FIG. 9
is a sectional view for explaining the Cu wiring to be included in the conventional semiconductor device. In
FIG. 9
, reference numeral
1
denotes a first barrier metal film, reference numeral
2
Cu wiring, reference numeral
3
a second barrier metal film, reference numeral
5
an interlayer film, respectively. The interlayer film
5
is formed on a substrate (not shown), so as to provide functions of insulation between the lead-in wirings, stress relaxation and alpha ray shielding of the semiconductor element. The silicon oxide which is a material of the insulation interlayer film to be included in the semiconductor element is preferably used as the interlayer film
5
because the interlayer film has proper insulation as the material of the interlayer film
5
in terms of the insulation between each lead-in wirings. In order to relax the stress, polyimide resin is preferably used as the material of the interlayer film
5
.
A method of producing the Cu wiring of the conventional semiconductor device will be described with reference to FIG.
9
. The Cu wiring is formed after the semiconductor element (not shown) has been formed. On a substrate where the interlayer film
5
has been formed on the surface thereof is filmed a titanium film serving as a first barrier metal film
1
. The Cu film serving as Cu wiring
2
is filmed to form a predetermined shape of Cu wiring
2
by a photo-lithography art. The photo-lithography art includes a step of forming an etching mask by using, for example, photo-resist or the like on the predetermined region of the film surfaces to be etched later, and a step of conducting the etching operation, such as dry etching or wet etching. Finally, a titanium (or titanium nitride) film serving as a second barrier metal film
3
is filmed. First barrier metal film
1
and second barrier metal film
3
of a predetermined shape are formed by the photo-lithography art. The second barrier metal film
3
covers the top face and side face of the surface of the Cu wiring
2
. By the above described conventional producing method, Cu wiring covered with barrier metal films composed of the first barrier metal film and the second barrier metal film can be formed.
When the Cu wiring has been formed by the conventional process (producing method), there arises a problem of a step coverage of the barrier metal film with respect to the side wall portion (side face) of the Cu wiring. Namely, the second barrier film becomes uneven in thickness, because the side face of the Cu wiring is vertical to the top face of the Cu wiring.
An object of the present invention is to provide a semiconductor device which can improve the step coverage of the barrier metal film with respect to lead-in wiring such as Cu wiring or the like, and a method of producing the semiconductor device.
SUMMARY OF THE INVENTION
A semiconductor device according to claim
1
of the present invention comprises a semiconductor element provided on a substrate, a lead-in wiring electrically connected with an electrode of the semiconductor element, a barrier metal film for covering the lead-in wiring surface to protect the lead-in wire. The section of the lead-in wiring, which is vertical to the lengthwise direction of the lead-in wiring, is inversely trapezoidal in shape.
Furthermore, in a semiconductor device according to claim
2
, the barrier metal film comprises a first barrier metal film for covering a bottom face and a side face of the lead-in wiring, and a second barrier metal film for covering a top face of the lead-in wiring.
In a semiconductor device according to claim
3
, a material of the first barrier metal film and a second barrier metal film is one of titan, titan nitride and tungsten.
A method of producing a semiconductor device according to claim
4
of the present invention comprises steps of: (i) providing a semiconductor element on a substrate; and (ii) providing on the substrate a lead-in wiring electrically connected with an electrode of the semiconductor element and having a surface covered with a first barrier metal film and a second barrier metal film. The second step comprises steps of forming a casting film having an inversely trapezoidal groove, composed of a material of an insulating interlayer film included in the semiconductor element or a material for protective film for covering the surfaces of the semiconductor element; providing a first barrier metal film on the groove surface of the casting film; providing the lead-in wiring within the groove of the casting film through the first barrier metal film; and providing a second barrier metal film on the top face of the lead-in wiring. The section of the lead-in wiring, which is vertical with respect to the lengthwise direction of the lead-in wiring, is inversely trapezoidal in shape.
In a method of producing a semiconductor device according to claim
5
, a material of the insulating interlayer film included in the semiconductor element is one of silicon oxide, silicon nitride, polyimide resin and epoxy resin.
In a method of producing a semiconductor device according to claim
6
, a material of the insulating interlayer film included in the semiconductor element is polyimide resin.
In a method of producing a semiconductor device according to claim
7
, a material for the protective film for covering the surface of the semiconductor element is one of polyimide resin, silicon oxide, silicon nitride, and epoxy resin.
In a method of producing a semiconductor device according to claim
8
, a material for the protective film for covering the surface of the semiconductor element is silicon nitride.
A method of producing a semiconductor device according to claim
9
the present invention comprises: a first step of providing a semiconductor element on a substrate; and a second step of providing on the substrate a lead-in wiring electrically connected with an electrode of the semiconductor element and having a surface covered with a first barrier metal film and a second barrier metal film. The second step comprises steps of: providing a first barrier metal film on the substrate; providing a metal film, one portion of which include the lead-in wiring later, on the first barrier metal film; providing a first etching mask in a region which becomes the lead-in wiring of the metal film, and providing a second etching mask of which adhesion force with respect to the metal film is weaker than that between the first etching mask and the metal film, in a regi
Leydig , Voit & Mayer, Ltd.
Mitsubishi Denki & Kabushiki Kaisha
Vu Hung Kim
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