Active solid-state devices (e.g. – transistors – solid-state diode – With means to control surface effects – Insulating coating
Reexamination Certificate
1997-09-04
2001-09-11
Everhart, Caridad (Department: 2825)
Active solid-state devices (e.g., transistors, solid-state diode
With means to control surface effects
Insulating coating
C257S760000, C438S623000, C438S783000
Reexamination Certificate
active
06288438
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and a fabrication method thereof. More particularly, the present invention relates a semiconductor device including an insulation film and a method of fabrication thereof.
2. Description of the Background Art
In the past years, intensive efforts have been taken to reduce the size of interconnections and provide multilayers for the purpose of further increasing the integration density of semiconductor integrated circuit devices. An interlayer insulation film is provided between each interconnection to obtain a multilayer structure of the interconnection. If the surface of this interlayer insulation film is not planar, a step-graded portion will be generated at the interconnection formed above the interlayer insulation film. This will cause defects such as disconnection. Therefore, the surface of the interlayer insulation film (the surface of the device) must be made as flat as possible. The technique to planarize the surface of the device is called planarization. This planarization technique has become important in reducing the size and providing multilayers of the interconnection.
In planarization, an SOG (Spin On Glass) film is known as an interlayer insulation film that is generally used. Recently, development in the planarization technique taking advantage of fluidity of a material of the interlayer insulation film is particularly noticeable.
An “SOG” is a generic term of a film mainly composed of a solution in which a silicon compound is dissolved in an organic solvent, and silicon dioxide formed from that solution.
In forming an SOG film, first a solution having a silicon compound dissolved in an organic solvent is applied in droplets on a rotated substrate. By this rotation, the solution coating is provided so as to alleviate the step-graded portion on the substrate corresponding to the interconnection. More specifically, the coating is formed thick at the concave portion and thin at the convex portion on the substrate. As a result, the surface of the solution coating is planarized.
Then, heat treatment is applied to vaporize the organic solvent. Also, polymerization proceeds to result in a planarized SOG film at the surface.
An SOG film is typically classified into an inorganic SOG film that does not include any organic component in a silicon compound, as represented by the following general formula (1), and an organic SOG film including an organic component in a silicon compound, as represented by the following general formula (2).
[SiO
2
]n (1)
[R
X
SiO
Y
]n (2)
(n, X, Y: integer; R: alkyl group or aryl group)
An inorganic SOG film includes a great amount of moisture and hydroxyl group. It is more brittle than a silicon oxide film formed by CVD (Chemical Vapor Deposition). There was a disadvantage that a crack is easily generated during the heat treatment when the thickness of the inorganic SOG film is greater than 0.5 &mgr;m.
In contrast, an organic SOG film does not have any cracks generated during the heat treatment, and the film thickness can be set to approximately 0.5-1 &mgr;m. Therefore, the usage of an organic SOG film allows the formation of a thicker interlayer insulation film. This means that sufficient planarization can be achieved even for a great step-graded portion on a substrate.
As described above, inorganic and organic SOG films have superior planarization. However, the great amount of moisture and hydroxyl group included in an inorganic SOG film will adversely affect a metal interconnection and the like to induce the problem of degrading the electrical characteristics and the action of corrosion.
A similar problem is seen in an organic SOG film. This is because, though smaller in comparison to an inorganic SOG film, the organic SOG film includes some amount of moisture and hydroxyl group.
To compensate for this disadvantage when an SOG film is employed as an interlayer insulation film, an insulation film such as a silicon oxide film formed by, for example, plasma CVD having the characteristics of insulation and mechanical strength in addition to the property of blocking moisture and hydroxyl group is provided above or beneath the SOG film.
However, the adhesion between such a silicon oxide film and an SOG film is poor. There was a disadvantage that they will peel away from each other after or during the fabrication process. This peel off will result in deterioration in the insulation characteristics to degrade the reliability of the device.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a semiconductor device that allows the adhesion intensity between an upper insulation film and a lower insulation film to be improved.
Another object of the present invention is to provide a fabrication method to facilitate fabrication of a semiconductor device that allows improvement of the adhesion intensity between an upper insulation film and a lower insulation film.
A further object of the present invention is to provide a method of fabricating a semiconductor device that can have interconnection resistance of a metal interconnection layer located under an insulation film reduced.
A method of fabricating a semiconductor device according to an aspect of the present invention includes the following steps. First, an insulation film of a 2-layered structure of at least an upper layer and a lower layer is formed on a semiconductor substrate. Impurities are introduced to the upper insulation film under the condition that the impurities arrive at least to the interface between the upper insulation film and the lower insulation film. Accordingly, the adhesion intensity between the upper insulation film and the lower insulation film can be improved. By implanting ions into the upper insulation film, the characteristic of the upper insulation film can be modified. The moisture and hydroxyl group included in that insulation film can be reduced. Also, that insulation film becomes less hygroscopic.
A method of fabricating a semiconductor device according to another aspect of the present invention includes the following steps. First, a first insulation film is formed on a semiconductor substrate. A second insulation film is formed on the first insulation film. Impurities having kinetic energy are introduced into the second insulation film under a condition where the impurities reach at least the interface between the second insulation film and the first insulation film. Accordingly, the adhesion intensity between the second insulation film and the first insulation film can be improved. By introducing impurities into the second insulation film, the second insulation film can be modified. The moisture and hydroxyl group included in the second insulation film is reduced. Also, the second insulation film becomes less hygroscopic. According to the above structure, a third insulation film can be formed on the second insulation film. Impurities are introduced preferably under the condition that the number of impurities passing through the interface is at least 2×10
13
atoms/cm
2
and not more than 2×10
18
atoms/cm
2
. The second insulation film can include any of a silicon oxide film containing at least 1% of carbon, an organic polymer, or an inorganic SOG film. The first insulation film preferably includes a film that is less hygroscopic than the second insulation film. Also, the impurities with kinetic energy are preferably introduced by ion-implantation. Furthermore, the impurities are preferably boron or argon ions.
A method of fabricating a semiconductor device according to a further aspect of the present invention includes the following steps. First, an insulation film having a 2-layered structure of at least an upper layer and a lower layer is formed on a metal interconnection layer formed on a semiconductor substrate. Impurities are introduced into the upper insulation film under the condition where the impurities pass through the interface between the upper insulation film and the l
Kojima Noriaki
Mizuhara Hideki
Watanabe Hiroyuki
Armstrong Westerman Hattori McLeland & Naughton LLP
Everhart Caridad
Sanyo Electric Co,. Ltd.
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