Semiconductor device including gate electrode for applying...

Details Semiconductor device including gate electrode for applying... Semiconductor device including gate electrode for applying...

2005-06-14

2005-06-14

Nhu, David (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Responsive to non-electrical signal

Reexamination Certificate

active

06906393

ABSTRACT:
A gate insulating film (13) and a gate electrode (14) of non-single crystalline silicon for forming an nMOS transistor are provided on a silicon substrate (10). Using the gate electrode (14) as a mask, n-type dopants having a relatively large mass number (70or more) such as As ions or Sb ions are implanted, to form a source/drain region of the nMOS transistor, whereby the gate electrode (14) is amorphized. Subsequently, a silicon oxide film (40) is provided to cover the gate electrode (14), at a temperature which is less than the one at which recrystallization of the gate electrode (14) occurs. Thereafter, thermal processing is performed at a temperature of about 1000° C., whereby high compressive residual stress is exerted on the gate electrode (14), and high tensile stress is applied to a channel region under the gate electrode (14). As a result, carrier mobility of the nMOS transistor is enhanced.

REFERENCES:
patent: 5815223 (1998-09-01), Watanabe et al.
patent: 6682965 (2004-01-01), Noguchi et al.
patent: 6750486 (2004-06-01), Sugawara et al.
patent: 2001-284558 (2001-10-01), None
patent: 2002-93921 (2002-03-01), None
J. Welser, et al., “NMOS and PMOS Transistors Fabricated in Strained Silicon/Relaxed Silicon-Germanium Structures”, Proc. of International Electron Device Meeting 1992, IEDM 92, pp. 1000-1002.
T. Mizuno, et al., “High Performance Strained-Si p-MOSFETs on SiGe-on-Insulator Substrates Fabricated by SIMOX Technology”, Proc. of International Electron Device Meeting 1999, IEEE, pp. 934-936.

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