Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...
Reexamination Certificate
2001-08-02
2003-01-28
Ngô, Ngân V. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Field effect device in non-single crystal, or...
C257S059000, C257S066000, C257S350000
Reexamination Certificate
active
06512247
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device, a liquid crystal display device (hereinafter referred to as a liquid crystal display device) employing the semiconductor device and methods of fabricating the semiconductor device and the liquid crystal display device, and in particular to techniques of fabricating a thin film transistor (hereinafter referred to as a TFT) comprising a polycrystalline semiconductor on an insulating substrate.
There is a technique for fabricating peripheral circuits such as a driver circuit for driving pixels and a control circuit for controlling the driver circuit at the periphery of an insulating substrate on which pixels are fabricated in a liquid crystal display panel, for example.
The process for fabricating a polycrystalline Si TFT (hereinafter referred to as a p-Si TFT) of the peripheral circuits is intrinsically a hot-temperature process, but a low-temperature process for it is realized by using a process explained below.
The low-temperature process comprises formation of an amorphous silicon (hereinafter referred to as an a-Si) film, conversion of the a-Si film into a polycrystalline film by irradiation of excimer laser, formation of a gate insulating oxide film by plasma CVD or the like, formation of a gate electrode made of a metal or a metallic silicide by a sputtering method or the like, formation of source and drain regions by ion doping or ion implantation, and then ion activation by laser annealing.
The above crystallization of an a-Si film by excimer laser uses a phenomenon that irradiation of a UV light pulse of about 20 ns melts the a-Si film and then crystallization occurs as the a-Si film cools.
But with the conventional method, it is very difficult to control the grain sizes, orientations and positions of crystals in the polycrystalline film because of fast crystallization and non-equilibrium process.
The larger the grain sizes are, the better the performance of the p-Si TFT becomes, but the wider the spread in the grain sizes becomes and consequently the wider the variability of TFT characteristics becomes.
If the grain sizes are selected to be sufficiently smaller than the length of a channel of TFTs, the variability of the TFT characteristics becomes smaller, but the TFT characteristics are degraded.
The p-Si TFTs of the peripheral circuits in the liquid crystal panel are of the so-called SOI (Silicon-On-Insulator) type using an insulating substrate such as a glass substrate and are not capable of establishing a substrate potential, and consequently an adverse effect such as a projection called a “kink” occurs in a current-voltage characteristic curve especially of the p-Si TFT constituting the high-performance peripheral circuits.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a semiconductor device or an LCD provided with TFTs having a polycrystalline film uniform in orientation of crystalline grains and containing few unwanted impurities introduced in grain boundaries (hereinafter referred to merely as grain boundary impurities) and a channel region of the TFTs formed of a polycrystalline film comprising a small number of crystal grains each having a diameter larger than a length of a channel of the TFTs and each having a grain boundary thereof aligned parallel with a source-drain direction of the TFTs.
It is another object of the present invention to provide an LCD having a liquid crystal display panel provided with a peripheral circuit formed on a substrate of the liquid crystal display panel wherein TFTs constituting at least the peripheral circuit have a polycrystalline film uniform in orientation of crystalline grains in a plane parallel with a major surface of the substrate and containing few grain boundary impurities and a channel region of the TFTs formed of a polycrystalline film comprising a small number of crystal grains each having a diameter larger than a length of a channel of the TFTs and each having a grain boundary thereof aligned parallel with a source-drain direction.
It is another object of the present invention to provide a semiconductor device or an LCD having TFTs provided with a polycrystalline conductive layer in contact with a polycrystalline semiconductor layer forming an active area of each of the TFTs such that a potential of a substrate on which the TFTs are formed is established by the polycrystalline conductive layer.
To accomplish the above objects, in accordance with an embodiment of the present invention, there is provided a display device comprising a pixel region having a plurality of pixels and a peripheral circuit region disposed at a periphery of said pixel region for driving the plurality of pixels, the peripheral circuit region including transistors fabricated from polycrystalline semiconductor and having a semiconductor crystalline grain of a first kind in a channel region thereof, a grain size of the semiconductor crystalline grain of the first kind being at least 3 &mgr;m, the pixel region including transistors fabricated from polycrystalline semiconductor and having a semiconductor crystalline grain of a second kind in a channel region thereof, and a grain size of the semiconductor crystalline grain of the second kind being at least 0.05 &mgr;m.
To accomplish the above objects, in accordance with another embodiment of the present invention, there is provided a display device comprising a pixel region having a plurality of pixels and a peripheral circuit region disposed at a periphery of the pixel region for driving the plurality of pixels, the peripheral circuit region including transistors fabricated from polycrystalline semiconductor and having a semiconductor crystalline grain of a first kind in a channel region thereof, a grain size of the semiconductor crystalline grain of the first kind in a channel region of one of the transistors being large enough to extend into both source and drain regions disposed on opposite sides of the channel region of the one of the transistors.
To accomplish the above objects, in accordance with another embodiment of the present invention, there is provided a display device comprising a pixel region having a plurality of pixels and a peripheral circuit region disposed at a periphery of the pixel region for driving the plurality of pixels, the peripheral circuit region including transistors fabricated from polycrystalline semiconductor and having a semiconductor crystalline grain of a first kind in a channel region thereof, the pixel region including transistors fabricated from polycrystalline semiconductor and having a semiconductor crystalline grain of a second kind in a channel region thereof, and a grain size of the semiconductor crystalline grain of the second kind being smaller than a grain size of the semiconductor crystalline grain of the first kind.
To accomplish the above objects, in accordance with another embodiment of the present invention, there is provided a display device comprising a pixel region having a plurality of pixels and a peripheral circuit region disposed at a periphery of the pixel region for driving the plurality of pixels, the peripheral circuit region including transistors fabricated from polycrystalline semiconductor and having a semiconductor crystalline grain of a first kind in a channel region thereof, a grain size of the semiconductor crystalline grain of the first kind being at least 3 &mgr;m, the pixel region including transistors fabricated from polycrystalline semiconductor and having a semiconductor crystalline grain of a second kind in a channel region thereof, and a grain size of the semiconductor crystalline grain of the second kind being in a range from 0.05 &mgr;m to 0.3 &mgr;m.
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patent: 6215154 (
Miyano Masanobu
Nagata Tetsuya
Ogino Toshio
Saito Masakazu
Suzuki Kenkichi
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