Semiconductor device including a floating gate memory cell...

Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Non-heterojunction superlattice

Reexamination Certificate

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C257S020000, C257S288000, C257S314000

Reexamination Certificate

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07659539

ABSTRACT:
A semiconductor device may include a semiconductor substrate and at least one non-volatile memory cell. The at least one memory cell may include spaced apart source and drain regions, and a superlattice channel including a plurality of stacked groups of layers on the semiconductor substrate between the source and drain regions. Each group of layers of the superlattice channel may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon, which may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. A floating gate may be adjacent the superlattice channel, and a control gate may be adjacent the second gate insulating layer.

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