Patent
1980-12-03
1983-12-27
James, Andrew J.
357 26, 357 55, 357 60, 357 72, H01L 2702, H01L 2984, H01L 2904, H01L 2328
Patent
active
044234341
ABSTRACT:
Semiconductor elements are arranged in a semiconductor substrate substantially equidistantly of a dicing line and oriented in the same direction. A region where the semiconductor elements are regularly arranged is the one where, when the semiconductor substrate and a semiconductor element are integrally formed with a sealing member, a characteristic of the semiconductor element abruptly changes, ranging from the center line of the dicing line to a point having stress of 90% of the stress developed in the center area of the semiconductor substrate or ranging from the center line of the dicing line to a point distanced from the center line by a distance 1.8 times the thickness of the semiconductor substrate or less. The semiconductor substrate with semiconductor elements arranged therein is integrally formed by a sealing member.
REFERENCES:
patent: 3965452 (1976-06-01), Seidel et al.
patent: 4025941 (1977-05-01), Kanda et al.
patent: 4236832 (1980-12-01), Komatsu et al.
patent: 4268848 (1981-05-01), Casey et al.
IBM Technical Disclosure Bulletin, vol. 15, No. 2, Jul. 1972 "Resistor Tracking on Monolithic Integrated Circuits" M. A. Battista et al., pp. 423-424.
Patent Abstracts of Japan, E-99, Mar. 22, 1979, vol. 3/No. 34.
German Auslegeschrift 19 06 324, published Sep. 4, 1969.
Carroll J.
James Andrew J.
Tokyo Shibaura Denki Kabushiki Kaisha
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