Semiconductor device having trenches and process for same

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material

Reexamination Certificate

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C438S425000, C438S431000, C438S437000, C438S435000, C438S700000, C438S701000, C148SDIG005

Reexamination Certificate

active

06518144

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device having trenches and a method for the same, in particular, to an improvement of the functions of a semiconductor device having trenches as well as to an improvement of the yield.
2. Description of the Background Art
FIGS. 18 and 19
are schematic cross section views showing a method of filling in a trench in accordance with the order of the steps according to a prior art. First, referring to
FIG. 18
, a trench
102
is formed in the surface of a semiconductor substrate
101
using, for example, anisotropic etching.
Referring to
FIG. 19
, an insulating film
103
made of, for example, a silicon oxide film is formed on the semiconductor substrate
101
so as to be filled into this trench
102
through, for example, a CVD (Chemical Vapor Deposition) method. In this way, the trench
102
is filled in.
In a method of filling in the trench
102
according to the prior art, however, the insulating film
103
has the characteristic that it is deposited more at the aperture part R
1
of the trench
102
than inside of the trench
102
. Therefore, in the case of a trench
102
which has a large aspect ratio (depth D/width W), the trench
102
is closed at the aperture part R
1
before the inside of the trench
102
is completely filled in. Therefore, the trench
102
cannot be filled in completely and, in many cases, a void
102
a
is left within the trench
102
. Especially, in the case that the aspect ratio of the trench
102
exceeds
10
, or in the case that silicon oxide film (SiO
2
) which is formed through a CVD method is used for filling, this phenomenon becomes significant.
In the case that the void
102
a
which is left inside of the trench
102
is large, there is a possibility that it affects the electric characteristics (main breakdown voltage or the like) of the semiconductor device. In addition, there are cases where thermal expansion and shrinkage are repeated in the vicinity of the void
102
a
due to temperature change in the operational environment of the semiconductor device so that the reliability for a long period of operation time is significantly harmed. Particularly, in the case that there is a void
102
a
in the vicinity of a pn junction to which the largest electric field of the device is applied, the above described problem of the reliability becomes more significant. In addition, in many cases of a power semiconductor device which is exposed to a high temperature and, therefore, this problem is significant.
The film thickness of the filled in material
103
, with which the trench
102
is filled in, essentially needs to be
½, or more, of the width W of the trench 102 at the minimum. Therefore, the wider the width W of the trench 102 is the thicker the film thickness T, of the insulating film 103 which is deposited on the surface of the semiconductor substrate 101, is according to the width W of the trench 102. In the case that the film thickness T of the insulating film 103 which is deposited on the surface of the semiconductor substrate 101 is large, the step between respective surfaces of the semiconductor substrate 101 and the insulating film 103 becomes large. Therefore, a problem arises in the structure, or in the following manufacturing steps, wherein the formation of contact holes or the patterning of a conductive layer in the vicinity of this step become difficult.
In order to solve the above described problem caused by the above step, the insulating film
103
, which is deposited on the surface of the semiconductor substrate
101
after being filled in into the trench
102
, may be removed. It is difficult, however, to remove only the insulating film
103
which is deposited thickly on the surface of the semiconductor substrate
101
while leaving most of the insulating film
103
inside of the trench
102
by removal through ordinary dry and wet etching methods. As for a comparatively excellent method, there is a method of removing the insulating film
103
which remains on the surface of the semiconductor substrate
101
by using a CMP (Chemical Mechanical Polishing) method, or the like. Even in the case when this method is used, however, the void
102
a,
which has been formed inside of the trench
102
, cannot be eliminated.
SUMMARY OF THE INVENTION
The purpose of the present invention is to provide a semiconductor device and a process for the same which can reduce the void inside of the trench in a simple method and which can make thinner the film thickness of the insulating film for filling in the trench which remains on the surface of the semiconductor substrate.
In a semiconductor device having a trench according to the present invention, elements and trenches are alternately and repeatedly arranged in the main surface of the semiconductor substrate wherein each of the plurality of elements arranged alternately with trenches repeatedly has a structure which is operated in the same operation mode and the insulating film which is filled in into the trenches does not have any voids in the vicinity of the pn junction to which the largest electric field of the element is applied or in the positions shallower than the pn junction.
In the semiconductor device having the trench according to the present invention this void can be prevented from affecting the element since the insulating film which fills in into the trench does not have any voids in the vicinity of a pn junction to which the largest electric field of the element is applied or in the position shallower than the pn junction.
In the case that the aspect ratio of the trench is 10, or more, in the above described semiconductor device, the occurrence of the void within the trench can be prevented particularly effectively.
In the case that the depth of the trench is 5 &mgr;m, or more, in the above described semiconductor device, the occurrence of the void within the trench is particularly prevented so that the harmful effect to the element by the occurrence of the void can be significantly prevented.
In the above described semiconductor device, in the case that the element has the first impurity region of the first conductive type which is formed on one side of the mesa region sandwiched between adjacent trenches, the second impurity region of the second conductive type which is formed on the other side of the mesa region and which forms a pn junction with the first impurity region and the third impurity region of the second conductive type which is formed on at least part of the main surface of the first impurity region, the harmful effect to the element due to the occurrence of the void can be particularly significantly prevented since the influence given to the element by the void within the trench is large.
In the above described semiconductor device, in the case that the third impurity region is a body part of an insulating gate-type field effect transistor and the pn junction to which the largest electric field of the element is applied is formed of the third impurity region and the first impurity region, the harmful effect to the element due to the occurrence of the void can be particularly significantly prevented since the electric field which is applied to the pn junction is large so that a large electric field is easily applied to the void.
A process for a semiconductor device according to the present invention includes the step of forming a trench in the main surface of a semiconductor substrate, the step of forming a first insulating film on the main surface of the semiconductor substrate in one step or in a plurality of divided steps so as to be filled in to the trench, the step of forming an aperture (opening portion) which reaches to the inside the trench in the first insulating film through an anisotropic etching in the first insulating film so that the upper edge corner parts of the aperture in the first insulating film has more round edge than the upper edge corner parts of the trench and of reducing the film thickness of the insulating film on the main

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