Semiconductor device having thin film transistor and method of m

Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...

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257347, 257635, 257640, 257646, 257649, H01L 2978

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active

053269896

ABSTRACT:
A thin film transistor is used as a load transistor in a memory cell in a SRAM. A load thin film transistor is arranged on an interlayer insulating layer on the surface of a silicon substrate. A silicon layer in which source/drain regions of the thin film transistor are formed is covered with an oxidation preventing film. An interlayer insulating layer which is to be subject to high temperature reflow processing is formed on the surface of the oxidation preventing film. The oxidation preventing film is formed of polycrystalline silicon, amorphous silicon, silicon nitride, or the like and formed on the silicon layer in the thin film transistor directly or through an insulating layer to cover the surface of the silicon layer.

REFERENCES:
patent: 5041888 (1991-08-01), Possin et al.
patent: 5130772 (1992-07-01), Choi
"Stacked CMOS SRAM Cell", C. E. Chen et al., IEEE Electron Device Letter, vol. EDL-4, No. 8, Aug. 1983 pp. 272-274.
"A high density SRAM cell using poly-Si pMOS FET", T. Yamanaka et al., SDM89-19, pp. 1-6.
"A 4-Mb CMOS SRAM with a PMOS Thin-Film-Transistor Load Cell", T. Ootani et al., IEEE Journal of Solid-State Circuits, vol. 25, No. 5, Oct. 1990, pp. 1082-1091.

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