Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package
Reexamination Certificate
2000-09-18
2004-09-28
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
C257S751000, C438S594000, C438S614000
Reexamination Certificate
active
06798050
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device and, more particularly, to a device having a copper pad and a method of fabricating the same.
Recently, in the field of semiconductor devices, wiring layers in a semiconductor chip are formed by using copper, instead of aluminum, for reasons of preventing signal delay and the like. In this case, pads formed on the surface of a semiconductor chip are also formed using copper like copper wiring.
The following three methods are used to mount a semiconductor chip on a wiring substrate and electrically connect them.
The first method is generally called flip chip mounting by which a semiconductor chip is mounted in a vertically inverted state on a wiring substrate. Solder bumps are formed on copper pads of the semiconductor chip. The semiconductor chip is mounted on the wiring substrate via the solder bumps, and a layer of an encapsulating resin is formed between them.
Solder balls arranged in the form of an array are formed on the opposite side of the wiring substrate and connected to a printed circuit board (not shown) or the like.
A method relevant to the present invention by which a solder bump is formed on a copper pad will be described below.
FIGS. 18A
to
18
E show a semiconductor device fabrication method of forming a copper pad in order of steps.
As shown in
FIG. 18A
, a copper pad
101
is formed on the surface of a silicon substrate
103
. With the surface of this copper pad
101
exposed, the silicon substrate
103
is covered with a passivation film
102
.
As shown in
FIG. 18B
, a titanium film
104
, a nickel film
105
, and a palladium film
106
are stacked in this order on the entire wafer surface by sputtering or evaporation, thereby forming a barrier metal.
As shown in
FIG. 18C
, this barrier metal is coated with a resist, and a hole is formed to obtain a resist film
107
. In this hole, solder plating is formed as a low-melting metal film
108
for forming a projecting electrode.
As shown in
FIG. 18D
, the resist film
107
is removed, and the Pd/Ni/Ti films
104
,
105
, and
106
forming the barrier metal are etched.
The whole semiconductor wafer is coated with a flux and heated in a nitrogen atmosphere to reflow the solder.
The second method is wire bonding. As shown in
FIG. 19
, a copper pad
302
is formed on a silicon substrate
300
. With the surface of this copper pad
302
exposed, the silicon substrate
300
is covered with a passivation film
301
. A gold wire
304
is connected to the copper pad
302
of this semiconductor chip. After this bonding connection, the semiconductor chip is mounted on a wiring substrate and encapsulated with a molding resin.
The third method uses TAB (Tape Automated Bonding). That is, a gold bump is formed on a pad of a semiconductor chip. The semiconductor chip is mounted on a metal cap, and a polyimide tape on which wiring is formed is connected to the gold bump.
Unfortunately, the aforementioned semiconductor devices have the following problems. As described above, a copper pad of a semiconductor chip is subjected to (1) flip chip mounting using a solder bump, (2) connection by bonding to a gold wire, or (3) TAB mounting using a gold bump. The problems of these methods will be separately described below.
(1) To form a solder bump on a copper pad, a metal stacked film is formed to suppress diffusion of tin in the solder. However, copper in the copper pad reaches the solder through this metal stacked film and forms an intermetallic compound of tin and copper. As a consequence, the shear strength lowers when the device is left to stand at high temperatures.
(2) In bonding connection of a copper pad and a gold wire, it is difficult to connect gold and copper by ultrasonic waves commonly used.
(3) To form a gold bump on a copper pad, a metal stacked film is formed to suppress diffusion of gold. However, copper in the copper pad reaches the gold through this metal stacked film. Consequently, the shear strength lowers by diffusion of the gold and copper.
To avoid the problem of item (1) above, a thick barrier metal of copper or nickel can be formed on a copper pad by electroplating. In this method, however, the number of fabrication steps increases by the plating step.
SUMMARY OF THE INVENTION
The present invention has been made in consideration of the above situation, and has as its object to provide a semiconductor device capable of ensuring high shear strength by connecting a solder bump, gold wire, or gold bump to a copper pad without increasing the number of fabrication steps, and a method of fabricating the same.
The present invention is a semiconductor device in which a semiconductor element having a copper pad is mounted on a wiring substrate, comprising a copper diffusion preventing film formed on the surface of the copper pad to prevent diffusion of copper, and a metal bump electrically connected to the copper pad with the copper diffusion preventing film interposed between them, wherein the semiconductor element is mounted on the wiring substrate via the metal bump.
The copper diffusion preventing film can contain at least one of Ni, Cr, TiN, TaN, Ta, Nb, and WN.
The present invention is a semiconductor device in which a semiconductor element having a copper pad is mounted on a wiring substrate, comprising a copper diffusion preventing film formed on the surface of the copper pad to prevent diffusion of copper, a metal film formed on the surface of the copper diffusion preventing film to improve adhesion between the copper diffusion preventing film and a metal wire, and the metal wire electrically connected to the copper pad with the copper diffusion preventing film and the metal film interposed between them, wherein the semiconductor element is mounted on the wiring substrate via the metal wire.
The copper diffusion preventing film can contain at least one of Ni, Cr, TiN, TaN, Ta, Nb, and WN, and the metal film can contain one of Au and Pd.
The metal bump can contain gold, and one of a stacked film of Ti, Ni, and Pd, a stacked film of Ti, Ni, and Au, a stacked film of TiW and Au, and a stacked film of TiW and Pd can be formed between the copper diffusion preventing film and the metal bump.
The metal bump can contain solder, and one of a stacked film of Ti and Ni, a stacked film of Ti, Ni, and Pd, a stacked film of Ti, Ni, and Au, a stacked film of Cr and Ni, a stacked film of Cr and Au, a stacked film of Cr, Ni, and Au, a stacked film of Cr, Ni, and Pd, a stacked film of Ti and Cu, a stacked film of Ti, Cu, and Au, a stacked film of Cr and Cu, and a stacked film of Cr, Cu, and Au can be formed between the copper diffusion preventing film and the metal bump.
The present invention is a method of fabricating a semiconductor device in which a semiconductor element having a copper pad is mounted on a wiring substrate, comprising the steps of forming a copper diffusion preventing film for preventing diffusion of copper on the surface of the copper pad, forming a metal bump to be electrically connected to the copper pad with the copper diffusion preventing film interposed between them, and mounting the semiconductor element on the wiring substrate via the metal bump.
The present invention is a semiconductor device fabrication method of mounting a semiconductor element having a copper pad on a wiring substrate by flip chip mounting by using a solder bump, comprising the steps of forming a copper diffusion preventing film for preventing diffusion of copper on the surface of the copper pad, forming a metal stacked film for suppressing diffusion of tin contained in a solder bump on the copper diffusion preventing film, forming the solder bump on the metal stacked film, and mounting the semiconductor element on the wiring substrate via the solder bump.
The metal stacked film can be one of a stacked film of Ti and Ni, a stacked film of Ti, Ni, and Pd, a stacked film of Ti, Ni, and Au, a stacked film of Cr and Ni, a stacked film of Cr and Au, a stacked film of Cr, Ni, and Au, a stacked film of Cr, Ni, and Pd, a stacked film of Ti and Cu, a
Ezawa Hirokazu
Homma Soichi
Miyata Masahiro
Andújar Leonardo
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Flynn Nathan J.
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