Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2007-07-12
2010-02-02
Vu, David (Department: 2818)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C438S222000, C438S226000, C438S442000, C438S443000, C257SE21560
Reexamination Certificate
active
07655533
ABSTRACT:
A semiconductor device includes a semiconductor substrate having an active region which includes a gate forming zone and an isolation region; an isolation layer formed in the isolation region of the semiconductor substrate to expose side surfaces of a portion of the active region including the gate forming zone, such that the portion of the active region including the gate forming zone constitutes a fin pattern; a silicon epitaxial layer formed on the active region including the fin pattern; and a gate formed to cover the fin pattern on which the silicon epitaxial layer is formed.
REFERENCES:
patent: 2005/0173740 (2005-08-01), Jin
patent: 2005/0282342 (2005-12-01), Adan
patent: 1770470 (2006-05-01), None
Ahn Sang Tae
An Hyeon Ju
Sheen Dong Sun
Song Seok Pyo
Hynix / Semiconductor Inc.
Ladas & Parry LLP
Taylor Earl N
Vu David
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