Semiconductor device having plated contacts and method thereof

Details Semiconductor device having plated contacts and method thereof Semiconductor device having plated contacts and method thereof

1998-03-02

1999-11-23

Thomas, Tom

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With contact or lead

257691, 257780, 257698, 257784, H01L 23053

Patent

active

059905476

ABSTRACT:
A package substrate (11) having access to a plating bus (36, 38) through intermediate routing layers (4, 6). Specifically, electrical contact between a solder pad (16, 19, 51), and its respective bond post (27), if any, is made by routing a trace (32, 52) through an intermediate routing layer (4, 6). The trace (32, 52) begins within a final package dimension (10) and extends to a peripheral portion (12) which is excised during manufacturing. There is a conductive trace (32, 52) visible from the side of the final packaged device (10').

REFERENCES:
patent: 5468999 (1995-11-01), Lin et al.
patent: 5640048 (1997-06-01), Selna

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