Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Patent
1996-04-22
1998-05-12
Jackson, Jerome
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
257678, 257687, 361728, H01L 2348
Patent
active
057510580
ABSTRACT:
Main current terminals (31, 32) electrically coupled to main electrodes of IGBT elements (27) which are loaded on a power substrate (30) project from a side wall of a case (21) to the exterior. The main current terminals (31, 32), which are in the form of flat plates having the same plane contours in principal parts thereof, are arranged to be parallel to each other and overlap with each other. Thus, inductances of the main current terminals (31, 32) are suppressed. An insulating member (33) is interposed between the portions of the main current terminals (31, 32) outwardly projecting from the case (21), while outwardly extending from the plane contours of the main current terminals (31, 32). Therefore, a withstand voltage across these portions of the main current terminals (31, 32) is maintained at a high value. The interior of the case (21) is filled up with an electric insulating filler (43), whereby a withstand voltage across the remaining portions of the main current terminals (31, 32) which are stored in the case (21) is also maintained at a high value. Thus, a high withstand voltage across the main current terminals and reduction of the inductances are compatibly implemented.
REFERENCES:
patent: 5134546 (1992-07-01), Izumi et al.
patent: 5408383 (1995-04-01), Nagasaka et al.
patent: 5497291 (1996-03-01), Hosen
Jackson Jerome
Kelley Nathan K.
Mitsubishi Denki & Kabushiki Kaisha
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