Semiconductor device having ohmic recessed electrode

Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Field effect transistor

Reexamination Certificate

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C257S194000, C257S272000, C257S368000, C257S396000, C257SE21407, C257SE21387, C257SE29315

Reexamination Certificate

active

07601993

ABSTRACT:
The present invention provides a semiconductor device having a recess-structured ohmic electrode, in which the resistance is small and variation in the resistance value caused by manufacturing irregularities is small. In the semiconductor device of the present invention, a two-dimensional electron gas layer is formed on the interface between a channel-forming layer and a Schottky layer by electrons supplied from the Schottky layer. The ohmic electrode comprises a plurality of side faces in ohmic contact with the two-dimensional electron gas layer. At least a part of side faces of the ohmic electrodes are non-parallel to a channel width direction. In a preferred embodiment of the present invention, the side faces have a saw tooth form or a comb tooth form. Since the contact area between the ohmic electrode and the two-dimensional electron gas layer is increased, ohmic resistance is reduced.

REFERENCES:
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patent: 5436468 (1995-07-01), Nakata et al.
patent: 5446296 (1995-08-01), Nakajima
patent: 5561305 (1996-10-01), Smith
patent: 5818078 (1998-10-01), Makiyama et al.
patent: 5949096 (1999-09-01), Ohkubo et al.
patent: 6936487 (2005-08-01), Ikeda et al.
patent: 2002/0005528 (2002-01-01), Nagahara
patent: 2003/0008440 (2003-01-01), Udagawa et al.
“Ultra HIgh Speed Compound Semiconductor Devices”, edited by M. Omori and supervised by T. Sugano, Baifukan, 6.2 Electrodes Formulation Technology (p. 196-202).
“AlGaN/GaN HEMT's with Recessed Ohmic Electrodes and Si Substrates”, K. Kaifu et al., 2005, The Electrochemical Society, ECS Transactions vol. 1, No. 2, pp. 259-265.

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