Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Field effect transistor
Reexamination Certificate
2008-02-21
2010-11-23
Dickey, Thomas L (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Heterojunction device
Field effect transistor
C257S192000
Reexamination Certificate
active
07838905
ABSTRACT:
A semiconductor device having multiple lateral channels with contacts on opposing surfaces thereof and a method of forming the same. In one embodiment, the semiconductor device includes a conductive substrate having a first contact covering a substantial portion of a bottom surface thereof. The semiconductor device also includes a first lateral channel above the conductive substrate and a second lateral channel above the first lateral channel. The semiconductor device further includes a second contact above the second lateral channel. The semiconductor device still further includes an interconnect that connects the first and second lateral channels to the conductive substrate operable to provide a low resistance coupling between the first contact and the first and second lateral channels.
REFERENCES:
patent: 4499481 (1985-02-01), Greene
patent: 4570174 (1986-02-01), Huang et al.
patent: 4636823 (1987-01-01), Margalit et al.
patent: 4807022 (1989-02-01), Kazior et al.
patent: 4903089 (1990-02-01), Hollis et al.
patent: 4903189 (1990-02-01), Ngo et al.
patent: 4967243 (1990-10-01), Baliga et al.
patent: 5055889 (1991-10-01), Beall
patent: 5068756 (1991-11-01), Morris et al.
patent: 5106778 (1992-04-01), Hollis et al.
patent: 5126701 (1992-06-01), Adlerstein
patent: 5126714 (1992-06-01), Johnson
patent: 5223449 (1993-06-01), Morris et al.
patent: 5231037 (1993-07-01), Yuan et al.
patent: 5244829 (1993-09-01), Kim
patent: 5292686 (1994-03-01), Riley et al.
patent: 5342795 (1994-08-01), Yuan et al.
patent: 5343071 (1994-08-01), Kazior et al.
patent: 5369042 (1994-11-01), Morris et al.
patent: 5374887 (1994-12-01), Drobnik
patent: 5407842 (1995-04-01), Morris et al.
patent: 5468661 (1995-11-01), Yuan et al.
patent: 5554561 (1996-09-01), Plumton
patent: 5555494 (1996-09-01), Morris
patent: 5610085 (1997-03-01), Yuan et al.
patent: 5624860 (1997-04-01), Plumton et al.
patent: 5700703 (1997-12-01), Huang et al.
patent: 5712189 (1998-01-01), Plumton et al.
patent: 5747842 (1998-05-01), Plumton
patent: 5756375 (1998-05-01), Celii et al.
patent: 5783984 (1998-07-01), Keuneke
patent: 5784266 (1998-07-01), Chen
patent: 5804943 (1998-09-01), Kollman et al.
patent: 5889298 (1999-03-01), Plumton et al.
patent: 5909110 (1999-06-01), Yuan et al.
patent: 5910665 (1999-06-01), Plumton et al.
patent: 5920475 (1999-07-01), Boylan et al.
patent: 5933717 (1999-08-01), Hause et al.
patent: 5956245 (1999-09-01), Rozman
patent: 5956578 (1999-09-01), Weitzel et al.
patent: 6008519 (1999-12-01), Yuan et al.
patent: 6038154 (2000-03-01), Boylan et al.
patent: 6094038 (2000-07-01), Lethellier
patent: 6097046 (2000-08-01), Plumton
patent: 6156611 (2000-12-01), Lan et al.
patent: 6181231 (2001-01-01), Bartilson
patent: 6191964 (2001-02-01), Boylan et al.
patent: 6208535 (2001-03-01), Parks
patent: 6218891 (2001-04-01), Lotfi et al.
patent: 6229197 (2001-05-01), Plumton et al.
patent: 6287908 (2001-09-01), Brand
patent: 6309918 (2001-10-01), Huang et al.
patent: 6323090 (2001-11-01), Zommer
patent: 6348848 (2002-02-01), Herbert
patent: 6362986 (2002-03-01), Schultz et al.
patent: 6477065 (2002-11-01), Parks
patent: 6483724 (2002-11-01), Blair et al.
patent: 6525603 (2003-02-01), Morgan
patent: 6549436 (2003-04-01), Sun
patent: 6661276 (2003-12-01), Chang
patent: 6741099 (2004-05-01), Krugly
patent: 6775159 (2004-08-01), Webb et al.
patent: 6873237 (2005-03-01), Chandrasekaran et al.
patent: 6980077 (2005-12-01), Chandrasekaran et al.
patent: 7012414 (2006-03-01), Mehrotra et al.
patent: 7046523 (2006-05-01), Sun et al.
patent: 7176662 (2007-02-01), Chandrasekaran
patent: 7285807 (2007-10-01), Brar et al.
patent: 7321283 (2008-01-01), Mehrotra et al.
patent: 7417266 (2008-08-01), Li et al.
patent: 7439556 (2008-10-01), Brar et al.
patent: 7439557 (2008-10-01), Brar et al.
patent: 7462891 (2008-12-01), Brar et al.
patent: 7504673 (2009-03-01), Sadaka et al.
patent: 2002/0121647 (2002-09-01), Taylor
patent: 2003/0141518 (2003-07-01), Yokogawa et al.
patent: 2003/0198067 (2003-10-01), Sun et al.
patent: 2003/0203583 (2003-10-01), Malik
patent: 2005/0001235 (2005-01-01), Murata et al.
patent: 2005/0024179 (2005-02-01), Chandrasekaran et al.
patent: 2005/0104080 (2005-05-01), Ichihara et al.
patent: 2006/0038650 (2006-02-01), Mehrotra et al.
patent: 2006/0091430 (2006-05-01), Sriram et al.
patent: 2006/0118824 (2006-06-01), Otsuka et al.
patent: 2006/0187684 (2006-08-01), Chandrasekaran et al.
patent: 2006/0197510 (2006-09-01), Chandrasekaran
patent: 2006/0198173 (2006-09-01), Rozman
patent: 2006/0202299 (2006-09-01), Chertouk
patent: 2006/0208279 (2006-09-01), Robinson et al.
patent: 2006/0226477 (2006-10-01), Brar et al.
patent: 2006/0226478 (2006-10-01), Brar et al.
patent: 2007/0007579 (2007-01-01), Scheuerlein et al.
patent: 2007/0045765 (2007-03-01), Brar et al.
patent: 2007/0069286 (2007-03-01), Brar et al.
patent: 2007/0145417 (2007-06-01), Brar et al.
patent: 2007/0187717 (2007-08-01), Sadaka et al.
patent: 2007/0296028 (2007-12-01), Brar et al.
patent: 2007/0298559 (2007-12-01), Brar et al.
patent: 2007/0298564 (2007-12-01), Brar et al.
patent: 2008/0048173 (2008-02-01), Sadaka et al.
patent: 2008/0048174 (2008-02-01), Sadaka et al.
patent: 2008/0048219 (2008-02-01), Brar et al.
patent: 2008/0054304 (2008-03-01), Sadaka et al.
patent: 1 256 985 (2002-11-01), None
patent: 1 638 147 (2006-03-01), None
patent: WO 2005/015642 (2005-02-01), None
patent: WO 2005015642 (2005-02-01), None
Ajit, J.S., “Design of MOS-Gated Bipolar Transistors with Integral Antiparallel Diode,” IEEE Electron Device Letters, pp. 344-347, Jul. 1996, vol. 17, No. 7, IEEE, Los Alamitos, CA.
Asano, K., et al., “Novel High Power AlGaAs/GaAs HFET with a Field-Modulating Plate Operated at 35V Drain Voltage,” IEDM 98, 1998, pp. 59-62, IEEE, Los Alamitos, CA.
Berroth, M., et al., “Extreme Low Power 1:4 Demultiplexer Using Double Delta Doped Quantum Well GaAs/AlGaAs Transistors,” Japanese Journal of Applied Physics, Extended Abstracts of the 22nd 1990 International Conference on Solid State Devices and Materials, 1990, pp. 75-78, Tokyo, Japan.
Eisenbeiser, K., et al., “Manufacturable GaAs VFET for Power Switching Applications,” IEEE Electron Device Letters, Apr. 2000, pp. 144-145, vol. 21, No. 4, IEEE, Los Alamitos, CA.
Kollman, R., et al., “10 MHz PWM Converters with GaAs VFETs,” IEEE Eleventh Annual Applied Power Electronics Conference and Exposition, Mar. 1996, pp. 264-269, vol. 1, IEEE, Los Alamitos, CA.
Lan, E., et al., “A Field Plate Device by Self-Aligned Spacer Process,” The International Conference on Compound Semiconductor Manufacturing Technology, 2004, pp. 35-38, GaAs Mantech, St. Louis, MO.
Liu, W., “Fundamentals of III-V Devices: HBTs, MESFETs, and HFETs/HEMTs,” §5-5: Modulation Doping, 1999, pp. 323-330, John Wiley & Sons, New York, NY.
Nguyen, L.D., et al., “Ultra-High-Speed Modulation-Doped Field-Effect Transistors: A Tutorial Review,” Proceedings of the IEEE, Apr. 1992, pp. 494-518, vol. 80, No. 4, IEEE, Los Alamitos, CA.
Niemela, V.A., et al., “Comparison of GaAs and Silicon Synchronous Rectifiers in a 3.3V Out, 50W DC-DC Converter,” 27th Annual, IEEE Power Electronics Specialists Conference, Jun. 1996, pp. 861-867, vol. 1, IEEE, Los Alamitos, CA.
Peppel, M., et al., “Optimized Reverse Diode Operation of Power MOSFETs,” 2000 IEEE Industry Applications Conference, Oct. 8, 2000, pp. 2961-2965, vol. 5, IEEE, Los Alamitos, CA.
Plumton, D.L., et al., “A Low On-Resistance High-Current GaAs Power VFET,” IEEE Electron Device Letters, Apr. 1995, pp. 142-144, vol. 16, No. 4, IEEE, Los Alamitos, CA.
Sickmiller, M., “Packaging of Ultrathin Semiconductor Devices Through the ELO Packaging Process,” Mat. Res. Soc. Symp. Proc., 2001, pp. I7.3.1-I7.3.6, vol. 681E, Materials Research Society, Warrendale, PA.
Storm, D.F., et al., “Reduction of Buffer Layer Conduction Near Plasma-Assisted Molecular-Beam Epitaxy Grown GaN/AIN Interfaces by Beryllium Doping,”
Brar Berinder P. S.
Ha Wonill
Dickey Thomas L
Flextronics International USA, Inc.
Slater & Matsil L.L.P.
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