Semiconductor device having multilayer interconnection structure

Details Semiconductor device having multilayer interconnection structure Semiconductor device having multilayer interconnection structure

1992-01-21

1993-04-13

Hille, Rolf

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

257758, 257763, 257915, H01L 23485, H01L 29460, H01L 29540

Patent

active

052025799

ABSTRACT:
A semiconductor device having a multilayer interconnection structure includes a tungsten plug buried in a contact hole formed in an interlayer insulating film covering first aluminum interconnection with a first titanium film and a first titanium nitride film interposed therebetween, and second aluminum interconnection formed thereon with a second titanium film and a second titanium nitride film interposed therebetween. According to this structure, remaining particles of an alterated layer of aluminum formed on the surface of the first aluminum interconnection are removed, and the first aluminum interconnection reacts with the first titanium film to form an intermetallic compound, so that mixing of the interface between them is carried out. Coverage of the contact hole is improved by burying the tungsten plug.

REFERENCES:
patent: 4884123 (1989-11-01), Dixit et al.
patent: 4924295 (1990-05-01), Kucher
patent: 4926237 (1990-05-01), Sun et al.
patent: 5008730 (1991-04-01), Huang et al.
Abe et al., "High Performance Multilevel Interconnection System with Stacked Interlayer Dielectrics by Plasma CVD and Bias Sputtering", IEEE 1989 VMIC Conference, Jun. 12-13, 1989, pp. 404-410.
Nishida et al., "Multilevel Interconnection for Half-Micron ULSI's", IEEE 1989 VMIC Conference, Jun. 12-13, 1989, pp. 19-25.
Fritsch et al., "A Submicron CMOS Two Level Metal Process with Planarization Techniques", IEEE 1988 VMIC Conference, Jun. 13-14, 1988, pp. 69-75.

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