Semiconductor device having miniaturized contact electrode and w

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum

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Details

257750, 257754, 257758, 257760, 257763, 257764, 257774, 257797, H01L 2348, H01L 2946, H01L 2954, H01L 2962

Patent

active

052432203

ABSTRACT:
A contact hole in a diffusion region is narrowed by a buffer layer formed at about the middle of an interlayer insulating film in its thickness direction. This buffer layer serves as effective alignment tolerances to the diffusion region and a contact electrode at the time of forming the contact hole. The structure having a wiring conductor filled in the contact hole and having the contact electrode formed on this wiring conductor can assure a highly reliable contact. Forming a buffer layer as a sidewall on this contact electrode and a first wiring layer formed on the same layer can assure an effective alignment tolerance to the first wiring layer at the time of forming a VIA hole. Filling a wiring conductor in the VIA hole can eliminate the need for any contact tolerance for a second wiring layer to be formed on this wiring conductor. Accordingly, the individual contact tolerances can be assured by self-alignment.

REFERENCES:
patent: 4641170 (1987-02-01), Ogura et al.
patent: 4866009 (1989-09-01), Matsuda
patent: 4878105 (1989-10-01), Hirakawa et al.
patent: 4962414 (1990-10-01), Liou et al.

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