Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate
1998-03-13
2002-06-04
Cao, Phat X. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified configuration
C257S522000, C257S531000
Reexamination Certificate
active
06400027
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to a semiconductor device, more especially to a semiconductor device comprising micro-wires of a preferable shape for use in a high-frequency semiconductor device.
BACKGROUND OF THE INVENTION
Recently, progress has been made in the development of a high-frequency integrated semiconductor such as GaAs integrated semiconductors which operate over a wide range of frequencies, spanning from a few GHz to 100 GHz. Wiring within these semiconductors is accomplished using microstrip lines. Transmission loss of signals traveling in the microstrip lines is a problem caused by increased resistance due to skin effect accompanied by the use of high frequency signals.
In order to reduce the increased of resistance due to skin effect, increasing the surface area of wiring is considered effective and a variety of processes for increasing the surface area of wiring have been hitherto known.
These examples include a process for increasing the film thickness of wiring as shown in FIG.
4
(
b
) and a process for increasing the film thickness of wiring and then making the cross-section of micro-wires U-shaped as shown in FIG.
4
(
c
) wherein both ends of the micro-wire are extended perpendicularly toward its substrate. As to the U-shaped micro-wire, reference can be made in the description of e.g., Hirano et al., “Preparation of a U-shaped micro-wire for MMIC” in the papers C-82 of the autumn meeting (1992) of Institute of Electronic, Information and Communication Engineers.
Japanese Patent Kokai Publication JP-A-5-109708 (1993) discloses the shape of a micro-wire like a coaxial line as shown in FIG.
4
(
d
) obtained by forming an insulating film
16
embedded inside rectangular micro-wires. This publication discloses a wiring system comprising micro-wires of a cross-sectional shape formed by encompassing entirely all the four peripheries of the insulating film
16
with metal conductor
15
that is fundamental wiring material, wherein the conductor, which constitutes a micro-wire, has not only the surface(interface) facing the outside insulating film but also the surface(interface) facing the insulating film
16
embedded inside, whereby the influence of the skin effect is inhibited to surpress the increase of wiring resistance even when high-frequency operation is performed.
The conventional processes disclosed above obtain the effect of reducing the increased wiring resistance by increasing the surface of wiring.
SUMMARY OF THE DISCLOSURE
In the course of investigations toward the present invention, the following problems have been encountered.
In order to reduce a chip area so as to form a highly integrated semiconductor and lower the chip cost, reducing the width of a micro-wire and the space(distance) between adjacent micro-wires is generally considered the most effective means. However, this makes the space between adjacent micro-wires narrow and the area of the adjacent side portions of micro-wires is increased. Accordingly, thick-film wiring as shown in
FIGS. 4
(
b
) and (
c
) increases the capacitance between adjacent micro-wires more than that of the normal wiring shown in FIG.
4
(
a
).
Now, a case is taken as an example in FIG.
4
(
a
),
12
denotes an insulating film,
13
denotes a plating feed layer, and
15
denotes a gold plating. Each of micro-wires shown in FIG.
4
(
b
) has a thickness of 2 &mgr;m, width of 10 &mgr;m and a space between adjacent micro-wires of 10 &mgr;m, and each of micro-wires having a U-shaped cross-section shown in FIG.
4
(
c
) has a thickness of 4 &mgr;m which is 2 times larger than the former, width of 5 &mgr;m and the space between adjacent micro-wires of 5 &mgr;m. In this case, the wiring surface area of the latter is 2.8 times larger than that of the former, which reduces by approximately 30% the wiring resistance caused by the skin effect. However, the latter has a capacitance of 20 &mgr;F-40 &mgr;m between two adjacent lines of 100 &mgr;m length which is 4 times greater than that of the former.
In cases where such microstrip lines are applied to spiral inductances which are passive elements of a high-frequency integrated semiconductor, the wiring length does not differ so that the inductance is nearly the same. However, resonant frequency f is reduced in proportion to an increase in the capacitance between adjacent micro-wires in accordance with the following formula (1).
f
=
1
2
π
1
2
LC
Consequently, the frequency band in which the spiral inductance can be operated shifts to become low, causing problems in the operation of the integrated semiconductor.
Accordingly, the present invention has been made in order to solve the aforementioned problems involved in the prior art. It is an object of the present invention is to provide a semiconductor device in which the surface area of wiring is increased and the capacitance between adjacent micro-wires is inhibited in a high-frequency integrated semiconductor device.
Further objects or aspects of the present invention will become apparent in the disclosure below.
In short, for attaining the above object, the present invention is based on a wiring structure (i.e., cross sectional shape) that increases the surface area of wiring without increasing the capacitance between adjacent micro-wires by providing a cross-sectional shape of micro-wires whose side portion is partially open (or recessed or bored).
According to an aspect of the present invention, micro-wires formed on an insulating layer applied to a semiconductor substrate with active elements and the like thereon may have a cross-sectional shape of micro-wires in which a side(direction) of both side portions is open to provide a hollow inside in each of the micro-wires.
According to a second aspect of the present invention, the open side portion of the micro-wire may be in the same direction(side) as that of the adjacent micro-wire.
As an alternative, the open side portion of the micro-wire may oppose to that of the adjacent micro-wire. That is, the open sides of the neighboring micro-wires oppose each other.
REFERENCES:
patent: 5357403 (1994-10-01), Haller et al.
patent: 5432126 (1995-07-01), Oikawa
patent: 5652157 (1997-07-01), Hirano et al.
patent: 5776828 (1998-07-01), Givens
patent: 61-269355 (1986-11-01), None
patent: 5-109708 (1993-04-01), None
Hirano et al., “Preparation of a U-Shaped Micro-Wire Technology for GaAs ICs”,Institute of Electronic, Information and Communication Engineers. C-82, 1992, pp. 2-420.
Cao Phat X.
NEC Corporation
Sughrue & Mion, PLLC
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