Semiconductor device having merged bipolar and MOS transistors a

Details Semiconductor device having merged bipolar and MOS transistors a Semiconductor device having merged bipolar and MOS transistors a

1991-07-01

1992-03-31

Wojciechowicz, Edward J.

Fishing, trapping, and vermin destroying

357 234, 357 239, 357 34, 357 59, 437 29, 437 31, 437 41, 437 43, 437191, 437196, H01L 2702, H01L 21265

Patent

active

051012570

ABSTRACT:
A semiconductor device (10) has a bipolar transistor merged with an MOS transistor, the two transistors being separated essentially by a sidewall spacer and the bipolar transistor being self-aligned to the MOS transistor. The MOS transistor includes a gate (22) and a sorce region (38). A drain region of the MOS transistor is also an active base region (27) of the bipolar transistor. The bipoloar transistor further includes a first emitter region (40) formed in the active base region and a second emitter region (32) which is formed on the first emitter region and partially overlies the MOS transistor gate. The second emitter region is separated from the gate by a sidewall spacer (29) and an overlying dielectric layer (23).

REFERENCES:
patent: 4786961 (1988-11-01), Avery
patent: 4868135 (1989-09-01), Ogura et al.
"A Bipolar-PMOS Merged Basic Cell for 0.8um Bicmos Sea-Of-Gates," by T. Hanibuchi et al. IEEE 1990 Custom Integrated Circuits Conference, pp. 4.2.1-4.2.4, Dec. 9-12, 1990.
"Merged Bipolar-CMOS Device", (author unknown) IBM Technical Disclosure Bulletin, vol. 28, No. 8, Jan. 1986, pp. 3558-3561.
The Stanford Bicmos Project, published by Center for Integrated Systems Stanford Universi Pertinent Chapter: Chapter 4 by R. Ritts et al., entitled, Complementary Merged Bicmos Devices and Circuits, pp. 31-45, Sep. 1990.
"Process Design for Merged Complementary BICMOD," by N. Rovendo et al., Technical Digest of the International Electron Devices Meeting, Dec. 9-12, 1990, pp. 485-488.

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