Semiconductor device having long pads and short pads alternated

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration

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Details

257779, 257780, 257781, 257784, 257786, H01L 2348

Patent

active

060085428

ABSTRACT:
An integrated circuit fabricated on a semiconductor chip is electrically connected through an array of pads to leads of a package; the pad array includes long pads exposed to first partially constricted openings and short pads exposed to second partially constricted openings and alternated with the long pads, and the wide portions of the first partially constricted openings are offset from the wide portions of the adjacent second partially constricted openings so that the manufacturer arranges the long pads and the short pads at a fine pitch less than 40 microns.

REFERENCES:
patent: 4763409 (1988-08-01), Takekawa et al.
Anderson et al., Extended Pad for Testing Package Parts, IBM Technical Disclosure Bulletin, vol. 27, No. 7B, Dec. 1984.

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