Active solid-state devices (e.g. – transistors – solid-state diode – Regenerative type switching device
Reexamination Certificate
2002-07-02
2004-07-20
Pham, Long (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Regenerative type switching device
Reexamination Certificate
active
06765239
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2001-206924, Jul. 6, 2001, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device having a junction-termination structure of a RESURF (RESURF: REduced SURface Field) type, and particularly to an improvement of the junction-termination region of a semiconductor chip.
2. Description of the Related Art
FIG. 4A
is a sectional view schematically showing the junction-termination region and its vicinity of a conventional punch-through type IGBT (Insulated Gate Bipolar Transistor) chip having a junction-termination structure of a RESURF type. As shown in
FIG. 4A
, the IGBT chip has an active region R
11
, a junction-termination region R
13
located around the active region R
11
, and a separation region R
12
interposed between the active region R
11
and the junction-termination region R
13
. An N
−
-first base layer
62
, an N
+
-buffer layer
68
, and a P
+
-collector layer
70
are disposed entirely over these regions R
11
to R
13
. In the active region R
11
, P
+
-second base layers
64
are formed in the surface of the first base layer
62
, and N
+
-emitter layers
66
are formed in the surface of the second base layers
64
.
A gate electrode
74
is disposed on and faces, through a gate insulating film
72
, the portion of each second base layer
64
sandwiched between the first base layer
62
and the corresponding emitter layer
66
. An emitter electrode
76
is disposed in contact with the second base layers
64
and the emitter layers
66
. A collector electrode
78
is disposed in contact with the collector layer
70
.
A P
+
-first diffusion layer
82
is formed in the front surface of the first base layer
62
, and extends from the active region R
11
through the separation region R
12
into the junction-termination region R
13
. In the junction-termination region R
13
, a P
−−
-second diffusion layer
84
for relaxing the surface electric field is formed in the front surface of the first base layer
62
. In the active region R
11
, a contact electrode
90
is disposed in contact with the first diffusion layer
82
. The contact electrode
90
is electrically connected to the emitter electrode
76
.
According to research conducted by the present inventors, it has been found in the structure shown in
FIG. 4A
, that there are ill effects of a parasitic current flowing in the junction-termination region, as described later.
BRIEF SUMMARY OF THE INVENTION
According to a first aspect of the present invention, there is provided a semiconductor device including an active region where a main semiconductor device section is disposed, and a junction-termination region located around the active region, the device comprising:
a first semiconductor layer of a first conductivity type, disposed as a semiconductor active layer common to the active region and the junction-termination region;
a first diffusion layer of a second conductivity type formed in a surface of the first semiconductor layer, and extending from the active region into the junction-termination region;
a second diffusion layer of the second conductivity type formed in a surface of the first semiconductor layer and in contact with the first diffusion layer, the second diffusion layer extending in the junction-termination region, and having a carrier impurity concentration lower than that of the first diffusion layer;
a first contact electrode disposed in the active region and in contact with the first diffusion layer, and electrically connected to a first main electrode of the main semiconductor device section;
a second contact electrode disposed in the junction-termination region and in contact with the first diffusion layer, and surrounding the active region; and
a connection electrode electrically connecting the first and second contact electrodes to each other.
According to a second aspect of the present invention, there is provided a semiconductor device including an active region, a junction-termination region located around the active region, and an intermediate region interposed between the active region and the junction-termination region, the device comprising:
a first semiconductor layer of a first conductivity type, disposed as a semiconductor active layer common to the active region, the intermediate region, and the junction-termination region;
a second semiconductor layer of a second conductivity type formed in one surface of the first semiconductor layer in the active region;
a third semiconductor layer of the first conductivity type formed in a surface of the second semiconductor layer;
a fourth semiconductor layer disposed on or in another surface of the first semiconductor layer in the active region;
a gate electrode facing, thorough a gate insulating film, a portion of the second semiconductor layer sandwiched between the first semiconductor layer and the third semiconductor layer;
a first main electrode disposed in contact with the second semiconductor layer and the third semiconductor layer;
a second main electrode disposed in contact with the fourth semiconductor layer;
a first diffusion layer of a second conductivity type formed in a surface of the first semiconductor layer on the same side as the second semiconductor layer, and extending from the active region through the intermediate region into the junction-termination region, the second semiconductor layer and the first diffusion layer having substantially the same carrier impurity concentration;
a second diffusion layer of the second conductivity type formed in a surface of the first semiconductor layer and in contact with the first diffusion layer, the second diffusion layer extending in the junction-termination region, and having a carrier impurity concentration lower than that of the first diffusion layer;
a first contact electrode disposed in the active region and in contact with the first diffusion layer, and electrically connected to the first main electrode;
a second contact electrode disposed in the junction-termination region and in contact with the first diffusion layer, and surrounding the active region; and
a connection electrode disposed in the intermediate region, and electrically connecting the first and second contact electrodes to each other.
REFERENCES:
patent: 5040042 (1991-08-01), Bauer et al.
patent: 5114876 (1992-05-01), Weiner
patent: 5610439 (1997-03-01), Hiyoshi et al.
Harada Tatsuo
Hasegawa Shigeru
Hiyoshi Michiaki
Inoue Naoyuki
Farahani Dana
Pham Long
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