Semiconductor device having interconnect lines and connection el

Details Semiconductor device having interconnect lines and connection el Semiconductor device having interconnect lines and connection el

1997-10-22

1999-07-20

Williams, Alexander Oscar

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Bump leads

257738, 257784, 257786, 257758, 257778, 257780, H01L 23528, H01L 2348, H01L 2352

Patent

active

059259310

ABSTRACT:
A semiconductor chip has such a structure as to have first connection electrodes formed at its upper circumferential edge portion and each exposed over a corresponding opening in a protective layer. An insulating layer is formed on the semiconductor chip except at each opening in the protective layer. Interconnect lines of an electroless-plated layer are formed on the first connection electrode. Solder bumps are formed on second connection electrodes formed together with the interconnect lines.

REFERENCES:
patent: 4720738 (1988-01-01), Simmons
patent: 4984061 (1991-01-01), Matsumoto
patent: 5394013 (1995-02-01), Oku et al.
patent: 5604379 (1997-02-01), Mori
patent: 5661344 (1997-08-01), Havemann et al.
patent: 5719439 (1998-02-01), Iwasaki et al.
patent: 5757078 (1998-05-01), Matsuda et al.
patent: 5801446 (1998-09-01), DiStefano et al.

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