Semiconductor device having impurity diffusion region formed in

Details Semiconductor device having impurity diffusion region formed in Semiconductor device having impurity diffusion region formed in

1992-09-04

1993-09-07

Hille, Rolf

Textiles: manufacturing

257400, 257504, 257306, 257547, H01L 2968, H01L 2348, H01L 2954

Patent

active

052432190

ABSTRACT:
A semiconductor device includes an impurity doped polycrystalline silicon layer formed on a first conductivity type semiconductor substrate with an oxide film provided therebetween, an interlayer insulation layer formed on the polycrystalline silicon layer and provided with a contact hole using the surface of the silicon layer as a bottom surface, and a conductive wiring layer formed on the surface of the interlayer insulation layer and on the inner wall surface of said contact hole. A second conductivity type impurity diffusion layer is formed at a region of the surface of the semiconductor substrate located below the contact hole. A pn junction formed between the impurity diffusion layer and the semiconductor substrate ensures insulation against its reverse bias voltage to prevent leakage current to the semiconductor substrate. This semiconductor device is manufactured by, for example, selectively implanting second conductivity type impurities to a region of the surface of the semiconductor substrate, at which region a contact hole is to be formed later.

REFERENCES:
patent: 4523216 (1985-06-01), Shiotari
patent: 4754318 (1988-06-01), Momose
patent: 4803541 (1989-02-01), Kouda
patent: 4899203 (1990-02-01), Ino
patent: 4916521 (1990-04-01), Yoshikawa et al.
patent: 4961104 (1990-10-01), Hirakawa

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