Semiconductor device manufacturing: process – Making regenerative-type switching device – Having field effect structure
Reexamination Certificate
2000-07-18
2001-04-17
Lee, Eddie C. (Department: 2815)
Semiconductor device manufacturing: process
Making regenerative-type switching device
Having field effect structure
C438S133000, C438S135000, C438S309000, C438S270000, C438S259000, C438S212000, C257S331000, C257S129000, C257S139000, C257S341000, C257S409000, C257S144000
Reexamination Certificate
active
06218217
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device having a high breakdown voltage and a method of manufacturing the same. More particularly, the present invention relates to a semiconductor device having a high breakdown voltage for use in a high-voltage inverter or the like, and a method of manufacturing the same.
2. Description of the Background Art
Semiconductor devices having a high breakdown voltage for use in high-voltage inverters or the like have recently been demanded to have a higher operation speed and a lower on-voltage in order to improve an operation efficiency and an operation controllability of the high-voltage inverters. In a field of a class of thousands of volts, GTO (Gate Turn-Off) thyristors have been largely used. However, it has been recently studied to improve breakdown voltages of IGBTs (Insulated Gate Bipolar Transistors) which allow increase in speed of devices.
Works are now being made to develop IGBTs of a gate trench type which can increase a supply capacity of electrons by microscopic processing. However, achievement of high operation speed and low on-voltage unpreferably causes reduction in a breakdown voltage, and therefore it is necessary to improve limits for them.
Referring to
FIG. 49
, description will be given on a structure of an IGBT of a gate trench type having a high breakdown voltage which has been studied.
FIG. 49
is a schematic cross section of an IGBT of a gate trench type having a high breakdown voltage.
The gate trench type IGBT having a high breakdown voltage includes a lightly doped n
−
silicon substrate
1
and p-wells
4
which are formed of p-type impurity diffusion regions formed at a first main surface (upper surface in the figure) of n
−
silicon substrate
1
. Gate trenches
70
extending from p-wells
4
into n
−
silicon substrate
1
are arranged with a certain pitch. Each gate trench
70
is formed of a gate trench groove
7
a
having a depth similar to the above pitch, a gate insulating film
7
arranged on an inner surface of gate trench groove
7
a
and a gate electrode
8
arranged inside gate insulating film
7
.
At portions of p-wells
4
contiguous to first main surfaces of gate trenches
70
, there are arranged n
+
emitter regions
5
formed of heavily doped n-type impurity diffusion regions.
Portions of gate electrode
8
and gate insulating film
7
of each gate trench
70
which are protruded beyond the first main surface are covered with a silicate glass film
19
. There is also formed an emitter electrode
10
, which covers entirely the first main surface, is formed of, e.g., a metal film, and is electrically connected to n
+
emitter regions
5
and p-wells
4
.
An n-buffer layer
2
formed of an n
+
impurity diffusion region is arranged at a second main surface (lower surface in the figure) of n
−
silicon substrate
1
. A p-collector region
3
made of a p
+
type impurity diffusion region is formed at a surface of n-buffer layer
2
. A collector electrode
11
made of, e.g., a metal film is arranged at a surface of p-collector region
3
. n-buffer layer
2
which is designed as a so-called punch through type is employed for improving a precision of the semiconductor device, and is not essential.
Operations of the above gate trench type IGBT having a high breakdown voltage will be described below.
First, an operation in an off state will be described below. A voltage is applied across collector electrode
11
and emitter electrode
10
while applying a voltage sufficiently lower than a gate threshold voltage across gate electrode
8
and emitter electrode
10
. Thereby, a junction between n
−
silicon substrate
1
and p-well
4
attains a reversely biased state, and a depletion layer extends mainly toward n
−
silicon substrate
1
. Since the gate potential is low, holes in p-well
4
are attracted to and accumulated at a surfaces of p-well
4
contiguous to gate trench
70
, so that the gate trench channel attains an off state.
An operation in an on state will be described below. A voltage is applied across collector electrode
11
and emitter electrode
10
while applying a voltage sufficiently higher than the gate threshold voltage across gate electrode
7
and emitter electrode
10
. Thereby, a surface contiguous to gate trench
70
attracts electrons in p-well
4
, because the gate potential is high. Therefore, n-inversion occurs, and a trench channel is formed. Thereby, electrons in n
−
silicon substrate
1
are supplied from n
+
emitter region
5
into n silicon substrate
1
through the trench channel, and electrons flow toward p-collector layer
3
carrying a positive potential.
When electrons flow into p-collector layer
3
, holes are supplied from p-collector layer
3
into n-buffer layer
2
. These holes cause conductivity modulation in n
−
silicon substrate
1
. If a life time in n
−
silicon substrate
1
is sufficiently long, these holes reach the vicinity of the trench channel, and will be attracted into p-well
4
at a lower potential.
Description will now be given on a so-called turn-off state in which the state changes from on state to the off state described above. In an inverter circuit which is typical application of a switching element having a high breakdown voltage, an inductive load is controlled in many cases.
FIG. 50
shows results of evaluation of the turn-off operation in a case where the inductive load is controlled in the conventional high-breakdown-voltage IGBT of the gate trench type.
When charges accumulated in the gate capacity decrease and the gate voltage lowers, a sufficient load current may not flow in the high-breakdown-voltage IGBT of the gate trench type, in which case a collector voltage rises. When the collector voltage exceeds 3000 V which is a bus voltage of the inverter circuit, the load current bypasses the IGBT and flows through a bus circuit, so that the collector current in the high-breakdown-voltage IGBT of the gate trench type decreases. When excessive carriers, which were accumulated in n
−
silicon substrate
1
and n-buffer layer
2
in the high-breakdown-voltage IGBT of the gate trench type during the on state, are discharged or released, the collector current of the high-breakdown-voltage IGBT of the gate trench type flows no longer, and the turn-off operation is completed.
The high-breakdown-voltage IGBT of the gate trench type described above suffers from the following problem in the off state. A current other than a slight leakage current generated inside a depletion layer does not flow between collector electrode
11
and emitter electrode
10
, and a high impedance is exhibited.
With increase in collector voltage, the depletion layer further extends to n-buffer layer
2
. The electric field in the IGBT increases as the voltage rises. Although the potential at the bottom of gate trench
70
is substantially equal to that at gate electrode
8
, the potential, which n
−
silicon substrate
1
under p-well
4
carries at a position at the same depth as the bottom, rises above the potential at p-well
4
(emitter potential) due to donor ions between the above-mentioned position to p-well
4
. In particular, the electric field at a bottom corner in gate trench
70
tends to increase.
In the above state, when the electric field inside the IGBT exceeds a threshold electric field and thereby tends to cause strong impact, a leakage current between collector electrode
11
and emitter electrode
10
rapidly increases, resulting in breakdown of the IGBT.
In order to achieve a high breakdown voltage of the IGBT, therefore, it is necessary to increase a drop voltage which exists in the depletion layer until the electric field reaches the threshold electric field. For this purpose, the thickness of n
−
silicon substrate
1
is increased so as to lower an impurity concentration. Also, in order weaken the electric field at the lower corner of gate trench
70
and thereby increase the thres
Nakamura Katsumi
Uenishi Akio
Brock II Paul E
Lee Eddie C.
McDermott & Will & Emery
Mitsubishi Denki & Kabushiki Kaisha
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