Semiconductor device having grooves to relieve stress...

Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame

Reexamination Certificate

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C257S698000, C257S696000, C257S691000, C257S673000, C257S690000, C257S784000, C257S751000, C257S734000, C257S737000, C257S738000, C257S774000, C257S773000

Reexamination Certificate

active

06841853

ABSTRACT:
A semiconductor device including a semiconductor chip having an electric circuit on a surface thereof, and an electrode pad formed on the surface of the semiconductor chip and which is electrically connected to the electric circuit. A conductive pattern is electrically connected to the pad, and a sealing resin covers the electric circuit and the conductive pattern. A part of the conductive pattern is exposed from the sealing resin, and a plurality of grooves are formed on the part of the conductive pattern. The plurality of grooves are disposed apart from each other and along a direction of stress of the expanding semiconductor chip. An external electrode is electrically connected to the conductive pattern. Stress of the external electrodes is thus relieved and as a result, reliability of the semiconductor device can be improved, because deterioration of the connecting quality can be prevented.

REFERENCES:
patent: 6037786 (2000-03-01), Palagonia
patent: 6085968 (2000-07-01), Swindlehurst et al.
patent: 6400021 (2002-06-01), Cho
patent: 20020011677 (2002-01-01), Yokoi et al.
patent: 20020125043 (2002-09-01), Yoshida
patent: 20030089969 (2003-05-01), Hashimoto
patent: 20030092219 (2003-05-01), Ohuchi et al.
patent: 20030218246 (2003-11-01), Abe et al.
patent: 2000-340696 (2000-12-01), None
patent: 2001-144217 (2001-05-01), None
patent: 2001-196403 (2001-07-01), None
patent: 2001-332653 (2001-11-01), None
patent: 2002-93948 (2002-03-01), None
patent: 2002-280484 (2002-09-01), None
patent: 2002-280487 (2002-09-01), None
patent: WO 0077843 (2000-12-01), None

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