Semiconductor device having floating and control gates

Details Semiconductor device having floating and control gates Semiconductor device having floating and control gates

1985-12-06

1988-08-30

Carroll, J.

Static information storage and retrieval

Magnetic bubbles

Guide structure

357 235, 357 239, 357 59, 365185, H01L 2978, H01L 2934, H01L 2904

Patent

active

047680806

ABSTRACT:
A semiconductor device such as a MOS transistor includes floating and control gates. Between the gates is provided a composite insulating layer including a silicon nitride layer. The end portions of the composite insulating layer extend in the channel-length direction of the MOS transistor beyond the end portions of at least one of the floating and control gates.

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patent: 4334347 (1982-06-01), Goldsmith et al.
patent: 4455568 (1984-06-01), Shiota
patent: 4488931 (1984-12-01), Pansana
patent: 4532535 (1985-07-01), Gerber et al.
T. C. Penn, "New Methods of Processing Silicon Slices,", Science, vol. 208, (1980), pp. 923-926.
S. Mori et al., "Poly-Oxide/Nitride/Oxide Structures for Highly Reliable EPROM Cells," 1984 Symposium on VLSI Technological Digest of Technical Papers, San Diego, (Sep. 1984), pp. 40-41.
M. Kikuchi et al., "A New Technique to Minimize the EPROM Cell", 1978 IEEE Int'l Electron Devices Mtg., Technical Digest, pp. 181-184.

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