Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...
Patent
1994-08-17
1997-01-07
Crane, Sara W.
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Field effect device in non-single crystal, or...
257 75, 257347, 257406, 257411, H01L 2976, H01L 31036, H01L 31112
Patent
active
055919898
ABSTRACT:
There is Disclosed a semiconductor device comprising a silicon film formed on a substrate having at least a surface formed of an insulative material, the silicon film being heat-treated at a temperature below 600.degree. C. and being partially coated with a silicon oxide film formed by electronic cyclotron resonance plasma CVD.
REFERENCES:
patent: 4859908 (1989-08-01), Yoshida et al.
patent: 4883766 (1989-11-01), Ishida et al.
patent: 5084905 (1992-01-01), Sasaki et al.
patent: 5124768 (1992-06-01), Mano et al.
patent: 5141885 (1992-08-01), Yoshida et al.
patent: 5144392 (1992-09-01), Brotherton
patent: 5231296 (1993-07-01), Rodder
Hiroyuki Ohshima et al., "Future Trends for TFT Integrated Circuits on Glass Substrates," IEDM 89, IEEE, pp. 157-160.
Hideo Izawa et al., "Low Temperature Deposition of High Quality Silicon Oxide Films," Japanese Journal of Applied Physics Extended Abstracts 22th Conf. Solid State Devices and Materials (1990), Tokyo, Japan, pp. 183-186.
Kunio Masumo, "Low Temperature Polysilicon TFTs by Non-Mass-Separated Ion Flux Doping Technique," Japanese Journal of Applied Physics Extended Abstracts 22th Conf. Solid State Devices and Materials (1990), Tokyo, Japan, pp. 975-978.
Ryuuma Hirano et al., "Fabrication of Polycrystalline Silicon Thin-Film Transistors by Ion Shower Doping Technique," Electronics and Communications in Japan, Part 2, vol. 71, No. 10, 1988, pp. 40-45.
Thomas W. Little et al., "A 9.5 Inch, 1.3 Mega-Pixel Low Temperature Poly-Si TFT-LCD Fabricated by SPC of Very Thin Films and an ECR-CVD Gate Insulator," Conference Record of the 1991 International Display Research Conference, presented Oct. 15-17, 1991, pp. 219-222.
Thomas W. Little et al., "Low Temperature Poly-Si TFTs Using Solid Phase Crystallization (SPC) of Very Thin Films and an ECR-CVD Gate Insulator," Extended Abstracts of the 1991 International Conference on Solid State Devices and Materials, Yokohama, Japan 1991, pp. 644-646.
Satoshi Inoue et al., "Low Temperature CMOS Self-Aligned Poly-Si TFTs and Circuit Scheme Utilizing New Ion Doping and Masking Technique," IEDM Technical Digest, International Electron Devices Meeting, Dec. 8-11, 1991, Washington, D.C., pp. 555-558.
Wolf et al., "Silicon Processing for the VLSI Era" vol. 1, Lattice Press, Sunset Beach, California, 1986, pp. 182-185.
Hatalis, et al., "High-Performance Thin-Film Transistors in Low-Temperature Crystallized LPCVD Amorphous Silicon Films", IEEE Electron Device Letters, vol. EDL-8, No. 8, Aug. 1987, pp. 361-364.
Little, et al., "Low Temperature Poly-Si TFTs Using Solid Phase Cystallization (SPC) of Very Thin Films and an ECR-CVD Gate Insulator", Japan Society of Applied Physics, 30L 84, uL91, pp. 644-646.
Little Thomas W.
Miyasaka Mitsutoshi
Crane Sara W.
Seiko Epson Corporation
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