Active solid-state devices (e.g. – transistors – solid-state diode – Regenerative type switching device – With means to control triggering
Reexamination Certificate
2000-09-26
2002-04-30
Meier, Stephen D. (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Regenerative type switching device
With means to control triggering
C257S133000, C257S139000
Reexamination Certificate
active
06380566
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device having an FET (Field Effect Transistor) structure with a high breakdown voltage, which is of the MOS (Metal Oxide Semiconductor) type or the MIS (Metal Insulator Semiconductor) type, and more particularly to a semiconductor device with a high breakdown voltage, using an SOI (Silicon On Insulator) substrate.
FIG. 9
is a sectional view schematically showing a lateral MOSFET as a conventional semiconductor device with a high breakdown voltage.
In this MOSFET, an n-embedded layer
102
having a low resistivity is formed on a p-semiconductor substrate
101
by means of epitaxial growth. An n-layer
104
having a high resistivity is formed on the n-embedded layer
102
by means of epitaxial growth.
A p-body layer
105
is formed selectively in the surface of the n-epitaxial layer
104
. An n-source layer
106
having a low resistivity and a p-contact layer
107
having a low resistivity are formed selectively in the surface of the p-body layer
105
. A source electrode
108
is disposed on the n-source layer
106
and the p-contact layer
107
.
An n-drain layer
109
having a low resistivity is formed selectively in the surface of the n-epitaxial layer
104
, such that it is separated from the p-body layer
105
by a predetermined distance. A drain electrode
110
is disposed on the n-drain layer
109
.
A gate electrode
112
having a field plate is disposed via a gate oxide film on the region between the n-drain layer
109
and the n-source layer
106
. The gate electrode
112
is arranged to induce an n-channel in the surface of the p-body layer
105
between the n-epitaxial layer
104
and the n-source layer
106
.
In this MOSFET, when a power supply voltage is applied to the n-drain layer
109
, a depletion layer extending from the p-body layer
105
to the n-epitaxial layer
104
is formed to correspond to the shape of the p-body layer
105
. In this case, since an electric field is intensified at a portion corresponding to the lower corner of the p-body layer
105
, it is difficult to obtain a high breakdown voltage without reducing the impurity concentration of the n-epitaxial layer
104
.
However, where the impurity concentration of the n-epitaxial layer
104
is low, when the device is turned on with a voltage applied to the gate electrode
112
higher than the threshold voltage, the resistivity of the n-epitaxial layer
104
becomes high, thereby increasing the ON-resistance of the device.
BRIEF SUMMARY OF THE INVENTION
The present invention has been made in consideration of the problem of the prior art, and its object is to provide a semiconductor device having an FET structure with a high breakdown voltage, which can realize a low ON-resistance while maintaining a high breakdown voltage.
According to a first aspect of the present invention, there is provided a semiconductor device with a high breakdown voltage comprising:
a semiconductor substrate;
an insulating layer disposed on the semiconductor substrate;
an active layer disposed on the insulating layer;
a RESURF (Reduced Surface Field) layer of a first conductivity type formed selectively in the active layer;
a drain layer of the first conductivity type formed selectively in the RESURF layer;
a drain electrode disposed to be in contact with the drain layer;
a well layer of a second conductivity type formed selectively in the active layer;
a source layer of the first conductivity type formed selectively in the well layer;
a source electrode disposed to be in contact with the well layer and the source layer; and
a gate electrode disposed via a gate insulating film on a region of the well layer between the source layer and the RESURF layer;
wherein the RESURF layer and the well layer are formed by diffusing impurities of the first and second conductivity types, respectively, such that an end of the RESURF layer reaches a position below the gate electrode, the RESURF layer and the well layer are formed of diffusion regions overlapping with each other, and the RESURF layer has a region in direct contact with the active layer between the drain layer and the well layer, whereby a carrier concentration gradient is formed in the RESURF layer such that a concentration of carriers of the first conductivity type decreases toward the well layer side.
According to a second aspect of the present invention, there is provided a semiconductor device with a high breakdown voltage comprising:
a semiconductor substrate;
an insulating layer disposed on the semiconductor substrate;
an active layer disposed on the insulating layer;
a RESURF layer of a first conductivity type formed selectively in the active layer;
a drain layer of the first conductivity type formed selectively in the RESURF layer;
a drain electrode disposed to be in contact with the drain layer;
a well layer of a second conductivity type formed selectively in the active layer;
a source layer of the first conductivity type formed selectively in the well layer;
a source electrode disposed to be in contact with the well layer and the source layer;
a gate electrode disposed via a gate insulating film on a region of the well layer between the source layer and the RESURF layer; and
a diffusion layer of the first conductivity type formed selectively in the active layer to overlap with the RESURF layer and the drain layer;
wherein the RESURF layer and the well layer are formed by diffusing impurities of the first and second conductivity types, respectively, and the diffusion layer is formed by diffusing an impurity of the first conductivity type at a dose higher than that of the RESURF layer, such that an end of the RESURF layer reaches a position below the gate electrode, the diffusion layer and the well layer are formed of diffusion regions not overlapping with each other, and the RESURF layer has a region in direct contact with the active layer between the diffusion layer and the well layer, whereby a carrier concentration gradient is formed in the RESURF layer such that a concentration of carriers of the first conductivity type increases toward the diffusion layer side.
According to a third aspect of the present invention, there is provided a semiconductor device with a high breakdown voltage comprising:
an active layer;
a RESURF layer of a first conductivity type formed selectively in the active layer;
a drain layer of the first conductivity type formed selectively in the RESURF layer;
a drain electrode disposed to be in contact with the drain layer;
a well layer of a second conductivity type formed selectively in the active layer;
a source layer of the first conductivity type formed selectively in the well layer;
a source electrode disposed to be in contact with the well layer and the source layer;
a gate electrode disposed via a gate insulating film on a region of the well layer between the source layer and the RESURF layer; and
a diffusion layer of the first conductivity type formed selectively in the active layer to overlap with the RESURF layer and the drain layer;
wherein the RESURF layer and the well layer are formed by diffusing impurities of the first and second conductivity types, respectively, and the diffusion layer is formed by diffusing an impurity of the first conductivity type at a dose higher than that of the RESURF layer, such that an end of the RESURF layer reaches a position below the gate electrode, the RESURF layer and the well layer are formed of diffusion regions overlapping with each other, the diffusion layer and the well layer are formed of diffusion regions not overlapping with each other, and the RESURF layer has a region in direct contact with the active layer between the diffusion layer and the well layer, whereby carrier concentration gradients are formed in the RESURF layer such that a concentration of carriers of the first conductivity type decreases toward the well layer side, and a concentration of carriers of the first conductivity type increases toward the diffusion layer side.
The semiconductor device with a high breakdown voltage according to any one of
Kawaguchi Yusuke
Matsudai Tomoko
Nagano Hirofumi
Nakagawa Akio
Nakamura Kazutoshi
LandOfFree
Semiconductor device having FET structure with high... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device having FET structure with high..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device having FET structure with high... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2837913