Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – For plural devices
Patent
1995-12-06
1997-07-08
Crane, Sara W.
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
For plural devices
257712, 257706, 257725, 257730, 257717, 257713, 257788, 257703, H01L 2312, H01L 2302
Patent
active
056464452
ABSTRACT:
In order to maintain parasitic inductances of main electrodes at low levels also during operation of a semiconductor device, upright portions of main electrode plates serving as paths of main currents are sealed in a side wall portion of a resin case, whereby the main electrode plates are fixed to the case while being maintained in parallel with each other. Further, lower end portions are opposed in parallel with each other through a flat insulating spacer. Thus, parasitic inductances caused in the main electrode plates are suppressed. Further, the lower end portions are not fixed to a circuit board but electrically connected to a power transistor through wires. Therefore, no deformation of the main electrodes is brought by thermal deformation of the circuit board following heat generation of the transistor, whereby the parallelism of the main electrode plates is maintained also during the operation of the device. Consequently, the parasitic inductances are maintained at low levels also during operation of the device.
REFERENCES:
patent: 4172261 (1979-10-01), Tsuzuki et al.
Masumoto Toshikazu
Takahama Shinobu
Crane Sara W.
Mitsubishi Denki & Kabushiki Kaisha
Williams Alexander Oscar
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