Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Low workfunction layer for electron emission
Reexamination Certificate
2001-08-29
2002-08-27
Abraham, Fetsum (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Thin active physical layer which is
Low workfunction layer for electron emission
C257S183000, C257S187000, C257S192000, C257S201000, C257S205000
Reexamination Certificate
active
06441391
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a field effect transistor (FET) with a sapphire substrate, in particular to a field effect transistor utilizing a group III nitride semiconductor material such as GaN.
BACKGROUND TO THE INVENTION
The group III nitride semiconductors including GaN have carrier transport characteristics close to that of GaAs, together with high breakdown electric fields due to their wide band gaps. They are, thus, regarded as strong candidate materials for high frequency, high power transistors.
When a device is manufactured making use of a GaN based semiconductor material, because it is difficult to obtain a bulk GaN based substrate, there is normally employed a method of fabricating a device wherein a GaN based semiconductor layer is formed by epitaxial growth on a substrate of a different material. For the substrate of a different material, sapphire or SiC is utilized. SiC has an excellent thermal conductivity but also drawbacks of high cost and difficulty to attain a large wafer area. In contrast, although sapphire has an inferior thermal conductivity, the cost can be lowered through the use of a wafer with a larger diameter. In application, therefore, these substrates of different materials are chosen appropriately, according to the use and the purpose for utilizing and so forth. In the field of MMICs (Monolithic Microwave Integrated Circuits) or the likes, there are some applications with small electric power in which the restriction for heat dissipation is not strong. In such applications, sapphire rather than SiC is in wide use. When, using a sapphire substrate, a FET is fabricated, in prior art, a C plane sapphire is utilized and the device is formed on the C plane (see Japanese Patent Application Laid-open, No. 82671/2000, Jpn. J. Appl. Phys. Vol.38 (1999) pp.2630 (T. Egawa et al.) and so on). FIG. 5 is a view showing a structure of a conventional MESFET (Metal Semiconductor FET) disclosed in FIG. 12 of Japanese Patent Application Laid-open, No. 82671/2000. Herein, upon a C plane sapphire substrate 51, a GaN buffer layer 52 and an n-type GaN channel layer 53 are laid, and a source electrode 54, a gate electrode 55 and a drain electrode 56 are formed thereon. Meanwhile, FIG. 6 is a view showing a structure of a conventional HEMT (High Electron Mobility Transistor) disclosed in FIG. 13 of the same publication. Upon a C plane sapphire substrate 61, a GaN buffer layer 62, a non-doped GaN channel layer 63 and an n-AlGaN electron supplying layer 64 are laid, and a source electrode 65, a gate electrode 66 and a drain electrode 67 are formed thereon. In both of these, a GaN based semiconductor layer is laid upon a C plane of sapphire to fabricate a FET. Further, it is described, in that publication, that any plane of sapphire such as an A plane, N plane, S plane, R plane, M plane or the like can be utilized in fabricating an optical device or an electronic device with a sapphire substrate. However, examples specifically disclosed therein are nothing else but the ones of forming a device on a C plane of sapphire, and any specific manufacturing methods or device design criteria for the cases to utilize any other plane are not described at all.
As described above, in conventional techniques, aGaN based semiconductor layer is formed upon a C plane of sapphire to form a device, which gives rise to the following problems.
First, attempts to obtain a wafer with a larger diameter are limited to a certain extent. In recent years, from the point of view of improving productivity, there have been demands that wafers should have larger diameters. Yet, the sapphire whose C plane is chosen for the crystal growth plane cannot be readily made to have a larger diameter, because of its low workability through surface polishing due to its poor mechanical processing feasibility and little ability to grow the crystal to have a large width by the ribbon crystal method or the like. A substrate with the largest diameter attained so far is 4 inches in diameter.
Secondly, a heat radiation characteristic thereof is difficult to improve. Since sapphire has a low thermal conductivity, improvements on the heat radiation characteristic have been sought after for some time and, for this purpose, thinner substrates have been looked for. Nevertheless, sapphire has insufficient feasibility in mechanical processing as described above so that a reduction in thickness is hard to achieve and, thus, the heat radiation characteristic is difficult to improve.
Thirdly, parasitic capacitances generated in the substrate are relatively large and act as an inhibitory factor to the improvement of device performance. Especially, in the case of a C plane sapphire, it is necessary to make the substrate have a certain thickness from the point of mechanical processing feasibility, which results in generation of large parasitic capacitances in the substrate.
SUMMARY OF THE INVENTION
In light of the above problems, an object of the present invention is, in a group III nitride semiconductor device, to improve the productivity and heat radiation characteristic and, at the same time, to improve device performance through a reduction in parasitic capacitances.
The present invention relates to a semiconductor device which comprises a group III nitride semiconductor layer formed on a single crystalline sapphire substrate, a source electrode and a drain electrode formed apart from each other on the surface of said group III nitride semiconductor layer, and a gate electrode formed between said source electrode and said drain electrode;
wherein
said group III nitride semiconductor layer is formed on an A plane of said single crystalline sapphire substrate.
The present invention provides a semiconductor device which comprises a group III nitride semiconductor layer formed on a single crystalline sapphire substrate, a source electrode and a drain electrode formed apart from each other on the surface of said group III nitride semiconductor layer, and a gate electrode formed between said source electrode and said drain electrode;
wherein
said group III nitride semiconductor layer is formed on an A plane of said single crystalline sapphire substrate; and the source electrode, the drain electrode and the gate electrode are formed to lie along a direction which makes an angle within 20° with a C axis of said single crystalline sapphire substrate.
In the present invention, a group III nitride semiconductor layer is formed on an A plane of a single crystalline sapphire substrate.
FIG. 4
is a view illustrating the orientation of planes of sapphire. In this drawing, a (0001) plane is formed perpendicular to the C axis, and a (11-20) plane is formed to associate with a pair of lateral faces of a hexagonal prism. In the illustration, formed are two {0001} planes (C planes) which are equivalent to (0001), six {11-20} planes (A planes) which are equivalent to (11-20), and six {1-100} planes (M planes) which are equivalent to (1-100), respectively. Among these planes, it is an A plane on which a group III nitride layer is formed to construct a FET in the present invention.
In the field of optical devices such as a semiconductor laser, there are some reports in which the technique to form a group III nitride semiconductor layer upon an A plane of sapphire is examined. For a GaN based optical device, too, although a C plane of a sapphire substrate is very often chosen as the crystal growth plane for a GaN based semiconductor layer, a proposal to use an A plane of sapphire as the crystal growth plane has been put forward, as described in Japanese Patent Application Laid-open No. 297495/1995.
Nevertheless, in the field of electronic devices including FETs, no attempts of forming a device on any plane other than the C plane, in particular on a sapphire A plane, has been made, which can be attributed to the following reasons.
For a FET making use of a group III nitride semiconductor, it is important to utilize carriers generated by the piezoelectric effect and spontaneous polarization effec
Ando Yuji
Hayama Nobuyuki
Kasahara Kensuke
Kuzuhara Masaaki
Matsunaga Kohji
Abraham Fetsum
Sughrue & Mion, PLLC
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