Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – With peripheral feature due to separation of smaller...
Patent
1994-10-17
1996-09-24
Brown, Peter Toby
Active solid-state devices (e.g., transistors, solid-state diode
Physical configuration of semiconductor
With peripheral feature due to separation of smaller...
257629, 437226, H01L 2358, H01L 2940
Patent
active
055593623
ABSTRACT:
In a semiconductor device having two metal connection layers formed on a scribe line area, the metal connection layers are connected to each other and further to a semiconductor substrate. The two metal connection layers are connected to each other via contact holes arranged along the scribe line area. This enhances heat dissipation and heat conductivity to allow heat to be rapidly transferred to the semiconductor substrate.
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patent: 5391920 (1995-02-01), Tsuji
By Tanaka, Masaki et al., "An Advanced ESD Test Method for Charged Device Model", EOS/ESD Symposium, 1992, pp. 76-87. No month.
Brown Peter Toby
NEC Corporation
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