Semiconductor device having different impurity concentration wel

Fishing – trapping – and vermin destroying

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437 30, 437 34, 437 47, 437 52, H01L 2170, H01L 2700

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active

052602265

ABSTRACT:
A semiconductor device comprises an N-type semiconductor substrate, a first P-type well formed in the semiconductor substrate, a second P-type well formed adjacent to the first P-type well in the semiconductor substrate, the surface impurity concentration of the second P-type well being set lower than that of the first P-type well, a DRAM memory cell structure formed in the first P-type well, and an MOS transistor structure formed in the second P-type well to function in combination with the memory cell structure.

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"An Experimental 4 Mb CMOS Dram", Furuyama et al., 1966 IEEE International Solid-State Circuits Conference, ISSCC 86/Feb. 21, 1986.
"An Experimental 1-Mbit BiCMOS DRAM", Kitsukawa et al., IEEE Journal of Solid-State Circuits, vol. SC-22, No., 5, Oct. 1987.
"Advanced BiCMOS Technology for High Speed VLSI", Ikeda et al., IEDM 86, IEEE 1986.
"Bipolar CMOS Merged Structure for High Speed M Bit DRAM", Kobayashi et al., IEDM 86, IEEE 1986.
"Physics and Technology of Semiconductor Devices", A. S. Grove, Fairchild Semiconductor, John Wiley & Sons, Inc., p. 209 (date unknown).
"Physics of Semiconductor Devices", S. M. Sze, John Wiley & Sons, pp. 192-193 and 196-197 (date unknown).

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