Semiconductor device having capacitors provided with...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum

Reexamination Certificate

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C257S758000, C438S637000, C438S672000

Reexamination Certificate

active

06740974

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2001-191716, filed Jun. 25, 2001, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device having MIM (Metal Insulating Metal) capacitors. The invention relates also to a method of manufacturing the semiconductor device.
2. Description of the Related Art
Semiconductor devices having MIM (Metal Insulating Metal) capacitors have been provided in recent years.
FIGS. 14
to
16
are sectional views, explaining a method of manufacturing a conventional semiconductor device that has MIS capacitors. The method will be described with reference to
FIGS. 14
to
16
.
First, via conductors
113
and first wirings
114
, made of copper, for example, are formed in the first inter-layer film
111
and second inter-layer film
112
by damascene process, as is illustrated in FIG.
14
. Then, a diffusion-preventing film
115
is formed on the second inter-layer film
112
, covering the first wirings
114
, by means of sputtering.
Thereafter, an MIM capacitor
120
is formed on the diffusion-preventing film
115
. The MIM capacitor
120
comprises a lower electrode film
116
, a dielectric film
117
, and an upper electrode film
119
. The films
116
,
117
and
119
are laid one on another, in the order they are mentioned.
As
FIG. 15
shows, a third inter-layer film
121
is formed on the diffusion-preventing film
115
, thus covering the capacitor
120
. The third inter-layer film
121
is processed, acquiring a flat and smooth upper surface. A fourth inter-layer film
122
is formed on the third inter-layer film
121
. A fifth inter-layer film
123
is formed on the third inter-layer film
122
.
RIE (Reactive Ion Etching) is performed on the third, fourth and fifth inter-layer films
121
,
122
and
123
, forming via holes
124
a,
124
b
and
124
c
and wiring trenches
125
a,
125
b
and
225
c,
as is illustrated in FIG.
16
. The resultant structure is subjected to annealing using a hydrogen-containing gas.
As
FIG. 16
depicts, via conductors
126
a,
126
b
and
126
c
made of copper are formed in the via holes
124
a,
124
b
and
124
c,
respectively. Further, second wirings
127
a,
127
b
and
127
c,
made of copper, too, are formed in wiring trenches
125
a,
125
b
and
125
c,
respectively. Then, a diffusion-preventing film
128
made of, for example, SiN (silicon nitride) is formed on the fifth inter-layer film
123
, covering the second wirings
127
a,
127
b
and
127
c.
In the conventional method, however, annealing using a hydrogen-containing gas is carried out before forming the via conductors
126
a,
126
b
and
126
c
and the second wirings
127
a,
127
b
and
127
c.
During the annealing, hydrogen enters the dielectric film
117
, inevitably reducing the film
117
. Consequently, the permittivity of the film
117
decreases. This results in a decrease in the capacitance of the capacitor
120
and an increase in the leakage current flowing between the electrode films
116
and
119
.
BRIEF SUMMARY OF THE INVENTION
According to a first aspect of the present invention, there is provided a semiconductor device that comprises a first electrode film, first and second electrode films, first and second connection parts, first and second wirings, and a protective insulating film. The second electrode film opposes the first electrode film. The capacitor insulating film is provided between the first electrode film and the second electrode film. The first and second connection parts are electrically connected to the first and second electrode films, respectively. The first wiring is electrically connected to the first electrode film by the first connection part. The second wiring is electrically connected to the second electrode film by the second connection part. The protective insulating film is provided between the capacitor insulating film and the second electrode film or on the second electrode film.
According to a second aspect of the present invention, there is provided a method of manufacturing a semiconductor device comprising a capacitor which has a first electrode film, a second electrode film, and a capacitor insulating film provided between the first and second electrode films. The method comprises: forming a protective insulating film between the capacitor insulating film and the second electrode film or on the second electrode film; forming a insulating film on the capacitor; forming a first trench configured to expose a part of the first electrode film, and a second trench configured to expose a part of the second electrode film; performing heat treatment which uses a hydrogen-containing gas; and forming in the first trench a first connection part electrically connected to the first electrode, and forming in the second trench a second connection part electrically connected to the second electrode film.


REFERENCES:
patent: 2002/0167086 (2002-11-01), Stauf et al.
patent: 2002/0185683 (2002-12-01), Yamazaki et al.
patent: 2002/0192881 (2002-12-01), Ballantine et al.

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