Semiconductor device manufacturing: process – Making passive device
Reexamination Certificate
2002-10-03
2004-06-08
Nguyen, Cuong (Department: 2811)
Semiconductor device manufacturing: process
Making passive device
C438S253000, C438S396000
Reexamination Certificate
active
06746929
ABSTRACT:
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2000-089290, filed Mar. 28, 2000, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device having a capacitor and a method of manufacturing the same.
In recent years, proposed is a semiconductor device using a Cu wiring of a damascene structure in accordance with progress in the fineness of the element.
FIG. 16
is a cross sectional view showing a conventional semiconductor device of a damascene structure. As shown in the drawing, a first wiring
62
made of, for example, Cu is formed in a SiO
2
film
61
, and a dielectric film
63
is formed on the first wiring
62
. Further, an upper electrode
64
is formed on the dielectric film
63
. Still further, a via hole
66
connected to the upper electrode
64
is formed in an interlayer insulating film
65
, and a second wiring
67
made of, for example, Cu, which is connected to the via hole
66
, is formed on the interlayer insulating film
65
.
In the conventional semiconductor device of the construction described above, the first wiring
62
, the dielectric film
63
and the upper electrode
64
collectively form a capacitor
68
. In other words, the first wiring
62
buried in the SiO
2
film
61
plays the role of the lower electrode of the capacitor
68
. The first wiring
62
is hereinafter referred to as a lower electrode.
However, in the conventional semiconductor device of the construction described above, the capacitance of the capacitor
68
is determined by the surface area of any of the lower electrode
62
and the upper electrode
64
having a smaller surface area. Therefore, where a capacitor having a large capacitance is required, it is necessary to enlarge the surface area of not only the upper electrode
64
but also the lower electrode
62
. Such being the situation, it was very difficult to form a capacitor having a large capacitance while promoting the fineness of the element.
FIG. 17
shows in a magnified fashion the portion B shown in FIG.
16
. As shown in
FIG. 17
, an edge portion
64
a
of the upper electrode
64
on the side of the dielectric film
63
forms an acute angle, with the result that the electric field is concentrated on the edge portion
64
a
, giving rise to a problem that the reliability of the element is lowered.
Further, although many of the capacitors used as analog passive elements are capacitors fixed at one kind of capacitance, there is a case where it is required to form within a single layer a plurality of capacitors having various capacitance values. For example, in order to cope with the pairing problem of the capacitors which occur nonuniform capacitance values that the capacitance values are rendered nonuniform among the capacitors, it is considered effective to diminish the influence given by the nonuniform capacitance values. However, if the area of the capacitor is increased, the delay time accompanying the charging is rendered long, making it necessary to diminish the capacitance per unit area of the capacitor because the capacitor having a small capacitance permits shortening the charging time so as to shorten the delay time accompanying the charging. For meeting such demands, it has become necessary to form a plurality of capacitors having at least two kinds of capacitance values within a single layer without increasing the chip area.
As described above, it was very difficult in the conventional semiconductor device to form a plurality of capacitors having a large capacitance or at least two kinds of capacitance values while promoting the fineness of the element. An additional problem to be noted is that an electric field is concentrated in an edge portion of the electrode so as to lower the reliability of the element.
BRIEF SUMMARY OF THE INVENTION
An object of the present invention, which has been achieved for overcoming the above-noted problems inherent in the prior art, is to provide a semiconductor device, which permits forming a capacitor having a large capacitance or a plurality of capacitors having at least two kinds of capacitance values while promoting the fineness of the element, and which also permits moderating the electric field concentration, and a method of manufacturing the same.
The particular object of the present invention can be achieved by the means described below.
According to a first aspect of the present invention, there is provided a first semiconductor device, comprising a first wiring formed in a first insulating film; a second insulating film formed on the first insulating film; a first electrode film selectively formed on the second insulating film; a third insulating film formed on the first electrode film, and having an end portion and a central portion, wherein the end portion has a thickness thinner than the central portion; a second electrode film formed on the central portion of the third insulating film such that the second electrode film faces the first electrode film; a fourth insulating film formed on the second electrode film and the end portion of the third insulating film; a fifth insulating film formed on the fourth insulating film; a sixth insulating film formed on the fifth insulating film; a seventh insulating film formed on the first interlayer insulating film; second, third and fourth wirings formed in the seventh insulating film; a first connecting member formed in the sixth, fifth and fourth insulating films to electrically connect the second wiring to the second electrode film; a second connecting member formed in the sixth, fifth and fourth insulating films and the end portion of the third insulating film to electrically connect the third wiring to the first electrode film; and a third connecting member formed in the sixth and second insulating films to electrically connect the fourth wiring to the first wiring.
The first and second electrode films and the third insulating film form a capacitor.
It is desirable for the side surface of the second connecting member is only in contact with the fourth and fifth insulating films.
Further, it is desirable for the seventh insulating film to be formed of an insulating film having a low dielectric constant.
Also, it is desirable for the second, fourth and fifth insulating films are a diffusion preventing film.
According to a second aspect of the present invention, there is provided a second semiconductor device, comprising a first wiring formed in a first insulating film; a second insulating film formed on the first insulating film; a first electrode film selectively formed on the second insulating film; a third insulating film selectively formed on the first electrode film and the second insulating film; a second electrode film formed on the third insulating film such that the second electrode film faces the first electrode film; a second wiring formed on the second electrode film; a third wiring formed on the second insulating film and positioned apart from the second wiring; a first connecting member formed in the second insulating film to electrically connect the first electrode film to the first wiring; and a second connecting member formed in the second insulating film to electrically connect the third wiring to the first wiring.
The first and second electrode films and the third insulating film form a capacitor.
According to a third aspect of the present invention, there is provided a third semiconductor device, comprising a first wiring formed in a first insulating film; a second insulating film formed on the first insulating film; a first electrode film selectively formed on the second insulating film in a manner to overlap partially with the first wiring; a third insulating film selectively formed on the first electrode film; a second electrode film formed on the third insulating film such that the second electrode film faces the first electrode film; a fourth insulating film formed on the first and second electrode films and the second insulating film; a fifth
Matsumoto Masahiko
Yoshitomi Takashi
Kabushiki Kaisha Toshiba
Nguyen Cuong
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
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