Semiconductor device having cap

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material

Reexamination Certificate

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Details

C257S710000, C257S680000, C257S676000, C257S730000, C257S731000

Reexamination Certificate

active

06239486

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device having a cap.
2. Description of the Related Art
A semiconductor device includes a substrate and a semiconductor component mounted to the substrate. The semiconductor component may be, for example, a semiconductor chip or a semiconductor package. There is a semiconductor device wherein a cap covers the semiconductor component and is attached to the substrate to protect the semiconductor component.
Japanese Unexamined Patent Publication No. 6-61383 discloses a semiconductor device having a cap. In this semiconductor device, a semiconductor chip is mounted to the bottom of a box-like ceramic package having a top opening and a cap is formed as a generally flat plate to be placed on the box-like ceramic package. Resin surrounds the semiconductor chip so that the upper portion of the semiconductor chip is exposed from the resin. A solder layer is disposed on the semiconductor chip and the resin, and the cap is placed above the solder layer. In this way, the semiconductor device protected from external force and excellent in the heat-dissipation ability is obtained. In addition, this flat cap has a vent hole.
In the prior art disclosed in the above-mentioned Japanese Unexamined Patent Publication No. 6-61383, the flat cap is attached to the box-like ceramic package having a top opening. Contrarily, there are other many semiconductor devices wherein a cap in the inverted cup shape is attached to a flat substrate.
The cap in the inverted cup shape is manufactured by a machining process such as a rotational cutting or a metal drawing. The cap manufactured by the rotational cutting is relatively expensive, and the cap obtained by the metal drawing is relatively inexpensive. Therefore, the cap obtained by the metal drawing is often used preferably. However, the cap obtained by the metal drawing has a drawback in that a stress is liable to concentrate on the respective corners of the cap during the drawing operation and causes a strain therein to result in a warpage of the cap.
Also, in the structure wherein a semiconductor chip is mounted to a substrate by flip-chip bonding, an underfill resin is filled in a gap between the substrate and the semiconductor chip. The semiconductor chip is adhered to a cap with an adhesive. The underfill resin or the adhesive generates gas or releases solvent therefrom when being cured. The gas and solvent deteriorate the adhesive which bonds the cap to the substrate. Also, there is a problem in that the gas or solvent expands in the interior of the tightly sealed cap and causes the cap to deform.
Therefore, if an opening is provided in the cap, the gas or solvent is released out of the cap, so the adhesive is not deteriorated and the cap is not deformed. In the semiconductor device disclosed in the above-mentioned Japanese Unexamined Patent Publication No. 6-61383, an opening is provided in the cap, but there is a solder layer and the opening is blocked by the solder layer. Accordingly, the gas or solvent generated or released from the adhesive or the like disposed under the solder layer is not released beyond the solder layer.
Also, electronic elements (such as a capacitor or a resistor) as well as a semiconductor chip may be mounted to the semiconductor device with solder to improve the performance of a semiconductor device. The substrate itself may be provided with solder bumps for connecting it to another substrate, a mother board or the like. In such a semiconductor device, the solder is washed after the electronic elements have been mounted to the substrate, the cap is then fitted to the substrate to tightly seal the electronic elements, thereafter, the solder bumps are formed on the substrate, and the solder is again washed. Thus, it is necessary to wash the solder twice.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a semiconductor device having a cap which is free from warpage even if the cap is manufactured through a metal drawing process, and from which gas or liquid can be released.
A semiconductor device according to the present invention comprises a substrate, a semiconductor component mounted to the substrate, and a cap covering the semiconductor component and attached to the substrate the cap having a top wall, a plurality of side walls extending downward from the top wall, corners between respective two adjacent side walls, and openings provided in the side walls at the corners. For example, the semiconductor component is one of a semiconductor chip and a semiconductor package.
In this structure, the corners between the respective two adjacent side walls are portions on which a stress is concentrated when the cap is manufactured by a metal drawing operation. Because the openings are provided in the corners, the concentration of stress on the corners when the cap is fabricated is mitigated, and the cap is not deformed and warped resulting in a product of an accurate shape. Also, it is possible to release gas or liquid out of the interior of the cap through the opening. Particularly, since the openings are provided in the corners, it is possible to wash the solder in the interior of the cap even after the cap has been attached to the substrate. In such a case, the opening allows a washing liquid to flow into and out from the interior of the cap.
Preferably, a thermally conductive paste is disposed between the semiconductor component and the cap. Preferably, the cap is further provided with a bottom wall connected to the side walls and having slits connected to the openings.


REFERENCES:
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patent: 4513353 (1985-04-01), Bakermans et al.
patent: 5148264 (1992-09-01), Satriano
patent: 5436402 (1995-07-01), Eehr et al.
patent: 5468910 (1995-11-01), Knapp et al.
patent: 5579212 (1996-11-01), Albano et al.
patent: 5644247 (1997-07-01), Hyan et al.
patent: 5656864 (1997-08-01), Mitsue et al.
patent: 5905301 (1999-05-01), Ichikawa et al.
patent: 5909057 (1997-06-01), McCormick et al.
patent: 5994784 (1999-11-01), Ahad
patent: 6011303 (2000-01-01), Tanaka et al.
patent: 6-61383 (1994-03-01), None

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