Semiconductor device having bumps in a same row for...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Wire contact – lead – or bond

Reexamination Certificate

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C257SE23069, C257SE23020, C257S786000, C257S737000, C257S775000, C257S774000, C257S773000, C257S780000, C257S782000, C257S690000, C257S691000, C257S692000, C257S693000, C257S048000, C257S778000

Reexamination Certificate

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07394164

ABSTRACT:
A semiconductor device has a plurality of bumps in a same row for staggered probing. The bumps in a same row are disposed on a chip and include a plurality of regular bumps and a plurality of irregular bumps. The regular bumps and the irregular bumps are interspersed in a same pitch. Along a defined line, the widths of the irregular bumps are narrower than the ones of the regular bumps for fine pitch applications. Additionally, the irregular bumps have a plurality of integral probed portions far away the line, top surfaces of which are expanded such that probed points can be defined on the probed portions for staggered probing.

REFERENCES:
patent: 5565385 (1996-10-01), Rostoker et al.
patent: 6251768 (2001-06-01), Lin
patent: 7064450 (2006-06-01), Eghan et al.
patent: 7075017 (2006-07-01), Nishi et al.
patent: 7087844 (2006-08-01), Ishimaru et al.
patent: 2003/0197251 (2003-10-01), Nakamura
patent: 2004/0188857 (2004-09-01), Ohnishi et al.
patent: 2006/0131726 (2006-06-01), Bruch
patent: 2006/0131993 (2006-06-01), Furuhata et al.
patent: 2007/0170601 (2007-07-01), Miyaki et al.

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