Semiconductor device manufacturing: process – Forming schottky junction – Compound semiconductor
Reexamination Certificate
2002-03-07
2004-05-04
Pham, Long (Department: 2814)
Semiconductor device manufacturing: process
Forming schottky junction
Compound semiconductor
C438S571000, C438S579000, C438S182000
Reexamination Certificate
active
06730586
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device having an overhanging structure and an electrode near the structure and a method for fabricating the same and particularly, the present invention is preferable to be applied to a hetero-junction bipolar transistor (HBT) or the like made of a group III-V compound semiconductor.
2. Description of the Related Art
A III-V group compound semiconductor transistor such as an HBT is widely utilized as a high-frequency and high-speed switching element.
FIG. 12
is a schematic cross-sectional view showing an example of a conventional HBT.
In the HBT, an n-type GaAs collector layer
102
, a p-type GaAs base layer
103
, and an emitter layer
104
are laminated in sequence on a semi-insulating GaAs substrate
101
by a metal-organic chemical vapor deposition method (an MOCVD method), and an ohmic emitter electrode layer
105
is provided on the emitter layer
104
.
In the emitter layer
104
, an n-type InGaP layer
104
a
, an n-type GaAs layer
104
b
, an n-type InGaP layer
104
c
, an n-type GaAs layer
104
d
, and an n-type InGaAs layer
104
e
are laminated in sequence, in which the n-type InGaP layer
104
c
, the n-type GaAs layer
104
d
, the n-type InGaAs layer
104
e
, and the emitter electrode layer
105
are processed to be a structure in an overhanging shape. The structure is constituted of the n-type InGaP layer
104
c
, the n-type GaAs layer
104
d
, and the n-type InGaAs layer
104
e
composing a stem portion and the emitter electrode layer
105
composing an umbrella-shaped portion.
Then, a protective film
106
constituted in a manner in which an insulating film is deposited on the entire surface to cover the overhanging structure and the insulating film is removed by etching with the umbrella-shaped portion as a mask, a base electrode layer
107
constituted on the n-type GaAs layer
104
b
by etching with the umbrella-shaped portion as a mask, in the same way as the protective film
106
, and a collector electrode layer
108
formed on the n-type GaAs collector layer
102
at a bottom of an opening which is formed in the n-type GaAs layer
104
b
, the n-type InGaP layer
104
a
, the p-type GaAs base layer
103
, and the n-type GaAs collector layer
102
are provided, and an interlayer insulating film
109
is formed on the entire surface so as to constitute the HBT.
In the HBT constituted as above, however, a trouble easily occurs in its base electrode layer, which mainly causes deterioration of reliability of a device in a high-temperature operation. This problem is caused not only on the HBT but also on a semiconductor device having an overhanging structure, in which an electrode is formed on a semiconductor layer with using the structure as a mask, for example, a self-aligned field effect transistor (FET) or the like, and early solution is presently awaited.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide, among semiconductor devices having an overhanging structure on a semiconductor layer, in which an electrode is formed on the semiconductor layer with the structure as a mask, represented by an HBT and an MESFET, a semiconductor device suppressing a trouble which tends to occur on the electrode (a base electrode layer in a case of HBT and a gate electrode in a case of MESFET) and realizing high reliability of the device especially in a high-temperature operation, and a method for fabricating the same.
As a result of intensive studies, the inventor has thought of forms of the invention explained below.
The present invention is applied to a semiconductor device having an overhanging structure on a semiconductor layer, in which an electrode is formed on the semiconductor layer with the structure as a mask, such as an HBT and a self-aligned FET, and a method for fabricating the same.
In a case of HBT, the structure is an emitter structure and the electrode is a base electrode, while in a case of self-aligned FET, the structure is a gate electrode and the electrode is a source and drain.
The semiconductor device of the present invention is characterized in that it comprises: a semiconductor layer; an overhanging structure formed on the semiconductor layer and having an umbrella-shaped portion; a protective film covering at least a part of a surface of the structure with an edge thereof on the semiconductor layer being positioned inside an edge of the umbrella-shaped portion; and an electrode formed at a position outside the umbrella-shaped portion at an interval from the edge of the protective film on the semiconductor layer.
The method for fabricating the semiconductor device of the present invention is characterized in that it comprises the steps of: forming an overhanging structure having an umbrella-shaped portion on a semiconductor layer; forming a protective film to cover a surface of the structure; processing the protective film by removal so that an edge thereof on the semiconductor layer is positioned inside an edge of the umbrella-shaped portion; depositing an electrode material on the semiconductor layer with the umbrella-shaped portion as a mask; and processing the electrode material to form an electrode at an interval from the edge of the protective film.
Specifically, here, the protective film is formed into a state of existing inside the edge of the umbrella-shaped portion on the semiconductor layer.
Such a shape of the protective film can be realized by forming a mask in a shape covering an area under the umbrella-shaped portion with an edge thereof being positioned inside the edge of the umbrella-shaped portion, and selectively removing the protective film using the mask.
The mask can be realized by executing the steps of: applying a resist onto the entire surface including the area under the umbrella-shaped portion; exposing the entire surface of the resist to light; and developing the resist so that an unexposed part thereof selectively remains in the area under the umbrella-shaped portion.
On the other hand, it is also preferable that the protective film is etched by an etching method having a directivity with respect to the surface, instead of using the aforesaid mask, and that the edge of the protective film is made to be positioned inside the edge of the umbrella-shaped portion by controlling the amount of etching.
Further, it is also preferable to form the protective film so that its edge is positioned at a contact point of a root of the structure and the semiconductor layer by leaving the protective film in a state of being substantially removed from the surface of the semiconductor layer.
Such a shape of the protective film can be realized by executing the steps of: forming a resist covering the entire surface including the area under the umbrella-shaped portion, constituted in a manner in which a first layer having high optical sensitivity and a film thickness covering a part of the area under the umbrella-shaped portion and a second layer having low optical sensitivity are laminated; exposing the entire surface of the resist to light; and forming a mask for processing the protective film by, in the area under the umbrella-shaped portion, developing the resist according to the respective optical sensitivity of the first layer and the second layer so as to be left in a shape covering only a surface of the structure in the area under the umbrella-shaped portion.
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Fujitsu Quantum Devices Limited
Le Thao X.
Pham Long
Westerman Hattori Daniels & Adrian LLP
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