Semiconductor device having an isolation layer region on the sid

Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – Groove

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Details

257618, 257506, 257509, 257510, H01L 2906, H01L 2900

Patent

active

052930610

ABSTRACT:
Steps or grooves are formed in a surface of a semiconductor substrate of a semiconductor device having a plurality of semiconductor elements, and an isolation layer is formed on regions that include the steps or side walls of the grooves.

REFERENCES:
patent: 3961358 (1976-06-01), Polinsky
patent: 4689871 (1987-09-01), Malhi
patent: 4926231 (1990-05-01), Hwang et al.
patent: 4947227 (1990-08-01), Teng
patent: 4975759 (1990-12-01), Sidner et al.
patent: 5013676 (1991-05-01), Horigome

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