Semiconductor device having an improved immunity to a short-circ

Details Semiconductor device having an improved immunity to a short-circ Semiconductor device having an improved immunity to a short-circ

1994-09-07

1996-05-21

Popek, Joseph A.

Static information storage and retrieval

Interconnection arrangements

365 51, 365226, G11C 506

Patent

active

055196500

ABSTRACT:
A semiconductor memory device includes a memory cell array (1) having a plurality of memory cells arranged in rows and columns, a plurality of column select lines (3) extending over the memory cell array and coupled to received column select signals generated by a column decoder (100), a plurality of power supply lines (4) provided in parallel with the column select lines to transfer a power supply voltage from a main power supply line (130), and a plurality of ground lines (5) provided in parallel with the column select lines to transfer a ground voltage from a main ground line. A plurality of fuse elements (6) are provided for each of the column select lines. When a short-circuit is found between a column select line and power supply line or a ground line, a fuse element corresponding to the short-circuited column select line is blown off and the short-circuited column select line is isolated from the column decoder. By repairing the short-circuited column select line with a redundant column select line (60), the memory device operates correctly without an adverse effect of the short-circuit.

REFERENCES:
patent: 4639895 (1987-01-01), Iwahashi et al.
patent: 4780851 (1988-10-01), Kurakami
patent: 5007025 (1991-04-01), Hwang et al.
patent: 5097448 (1992-03-01), Segawa
patent: 5231607 (1993-07-01), Yoshida et al.
patent: 5293559 (1994-03-01), Kim et al.

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