Semiconductor device having an ESD protection circuit

Electricity: electrical systems and devices – Safety and protection of systems and devices – Load shunting by fault responsive means

Reexamination Certificate

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Reexamination Certificate

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07826186

ABSTRACT:
When a manufacturing process becomes finer and a threshold value drops, a leakage current generates in a MOS transistor that is normally in an off-state. In order to suppress an influence of a leakage current that is generated in a protection transistor that constitutes a protection circuit on the internal circuit, an adjustor circuit that forms a transit path of the leakage current is disposed within the protection circuit, and a monitor circuit having the same circuit configuration as a configuration of the protection circuit is disposed to control an impedance of the transit path in the protection circuit and the monitor circuit so as to allow the leakage current to flow through the transit path.

REFERENCES:
patent: 5579200 (1996-11-01), Rajkanan et al.
patent: 6650164 (2003-11-01), Kondo
patent: 2003-133855 (2003-05-01), None

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